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3a327316ad
Continuing the preparation for additional _FloatN / _FloatNx aliases, this patch makes long double functions in sysdeps/ia64/fpu use libm_alias_ldouble macros, so that they can have _Float64x aliases added in future. Most ia64 libm functions are defined using ia64-specific macros in libm-symbols.h. These are left unchanged, with libm-alias-ldouble.h included from libm-symbols.h (and the expectation that other libm-alias-*.h headers will be included from there as well in future), and libm_alias_ldouble_other then being used in most cases to define aliases for any additional types (currently the empty set). Functions that used weak_alias are converted to use libm_alias_ldouble. Tested (compilation only) with build-many-glibcs.py for ia64, including that installed stripped shared libraries are unchanged by the patch. * sysdeps/ia64/fpu/libm-symbols.h: Include <libm-alias-ldouble.h>. * sysdeps/ia64/fpu/e_acoshl.S (acoshl): Use libm_alias_ldouble_other. * sysdeps/ia64/fpu/e_acosl.S (acosl): Likewise. * sysdeps/ia64/fpu/e_asinl.S (asinl): Likewise. * sysdeps/ia64/fpu/e_atanhl.S (atanhl): Likewise. * sysdeps/ia64/fpu/e_coshl.S (coshl): Likewise. * sysdeps/ia64/fpu/e_exp10l.S (exp10l): Likewise. * sysdeps/ia64/fpu/e_exp2l.S (exp2l): Likewise. * sysdeps/ia64/fpu/e_fmodl.S (fmodl): Likewise. * sysdeps/ia64/fpu/e_hypotl.S (hypotl): Likewise. * sysdeps/ia64/fpu/e_lgammal_r.c (lgammal_r): Define using libm_alias_ldouble_r. * sysdeps/ia64/fpu/e_log2l.S (log2l): Use libm_alias_ldouble_other. * sysdeps/ia64/fpu/e_logl.S (logl): Likewise. (log10l): Likewise. * sysdeps/ia64/fpu/e_powl.S (powl): Likewise. * sysdeps/ia64/fpu/e_remainderl.S (remainderl): Likewise. * sysdeps/ia64/fpu/e_sinhl.S (sinhl): Likewise. * sysdeps/ia64/fpu/e_sqrtl.S (sqrtl): Likewise. * sysdeps/ia64/fpu/libm_sincosl.S (sincosl): Likewise. * sysdeps/ia64/fpu/s_asinhl.S (asinhl): Likewise. * sysdeps/ia64/fpu/s_atanl.S (atanl): Likewise. (atan2l): Likewise. * sysdeps/ia64/fpu/s_cbrtl.S (cbrtl): Likewise. * sysdeps/ia64/fpu/s_ceill.S (ceill): Likewise. * sysdeps/ia64/fpu/s_copysign.S (copysignl): Define using libm_alias_ldouble. * sysdeps/ia64/fpu/s_cosl.S (sinl): Use libm_alias_ldouble_other. (cosl): Likewise. * sysdeps/ia64/fpu/s_erfcl.S (erfcl): Likewise. * sysdeps/ia64/fpu/s_erfl.S (erfl): Likewise. * sysdeps/ia64/fpu/s_expm1l.S (expm1l): Likewise. (expl): Likewise. * sysdeps/ia64/fpu/s_fabsl.S (fabsl): Likewise. * sysdeps/ia64/fpu/s_fdiml.S (fdiml): Likewise. * sysdeps/ia64/fpu/s_floorl.S (floorl): Likewise. * sysdeps/ia64/fpu/s_fmal.S (fmal): Likewise. * sysdeps/ia64/fpu/s_fmaxl.S (fmaxl): Likewise. * sysdeps/ia64/fpu/s_frexpl.c (frexpl): Likewise. * sysdeps/ia64/fpu/s_ldexpl.c (ldexpl): Likewise. * sysdeps/ia64/fpu/s_log1pl.S (log1pl): Likewise. * sysdeps/ia64/fpu/s_logbl.S (logbl): Likewise. * sysdeps/ia64/fpu/s_modfl.S (modfl): Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S (nearbyintl): Define using libm_alias_ldouble. * sysdeps/ia64/fpu/s_nextafterl.S (nextafterl): Use libm_alias_ldouble_other. * sysdeps/ia64/fpu/s_rintl.S (rintl): Likewise. * sysdeps/ia64/fpu/s_roundl.S (roundl): Likewise. * sysdeps/ia64/fpu/s_scalbnl.c (scalbnl): Define using libm_alias_ldouble. * sysdeps/ia64/fpu/s_tanhl.S (tanhl): Use libm_alias_ldouble_other. * sysdeps/ia64/fpu/s_tanl.S (tanl): Likewise. * sysdeps/ia64/fpu/s_truncl.S (truncl): Likewise. * sysdeps/ia64/fpu/w_lgammal_main.c [BUILD_LGAMMA && !USE_AS_COMPAT] (lgammal): Likewise. * sysdeps/ia64/fpu/w_tgammal_compat.S (tgammal): Likewise.
277 lines
7.3 KiB
ArmAsm
277 lines
7.3 KiB
ArmAsm
.file "sqrtl.s"
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// Copyright (c) 2000 - 2003, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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//
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//********************************************************************
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//
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// History:
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// 02/02/00 (hand-optimized)
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// 04/04/00 Unwind support added
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// 08/15/00 Bundle added after call to __libm_error_support to properly
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// set [the previously overwritten] GR_Parameter_RESULT.
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// 05/20/02 Cleaned up namespace and sf0 syntax
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// 02/10/03 Reordered header: .section, .global, .proc, .align
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//
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//********************************************************************
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//
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// Function: Combined sqrtl(x), where
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// _
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// sqrtl(x) = |x, for double-extended precision x values
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//
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//********************************************************************
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//
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// Resources Used:
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//
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// Floating-Point Registers: f8 (Input and Return Value)
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// f7 -f14
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//
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// General Purpose Registers:
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// r32-r36 (Locals)
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// r37-r40 (Used to pass arguments to error handling routine)
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//
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// Predicate Registers: p6, p7, p8
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//
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//********************************************************************
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//
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// IEEE Special Conditions:
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//
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// All faults and exceptions should be raised correctly.
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// sqrtl(QNaN) = QNaN
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// sqrtl(SNaN) = QNaN
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// sqrtl(+/-0) = +/-0
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// sqrtl(negative) = QNaN and error handling is called
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//
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//********************************************************************
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//
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// Implementation:
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//
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// Modified Newton-Raphson Algorithm
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//
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//********************************************************************
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GR_SAVE_PFS = r33
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GR_SAVE_B0 = r34
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GR_SAVE_GP = r35
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GR_Parameter_X = r37
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GR_Parameter_Y = r38
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GR_Parameter_RESULT = r39
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GR_Parameter_TAG = r40
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FR_X = f15
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FR_Y = f0
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FR_RESULT = f8
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.section .text
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GLOBAL_IEEE754_ENTRY(sqrtl)
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{ .mlx
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alloc r32= ar.pfs,0,5,4,0
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// exponent of +1/2 in r2
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movl r2 = 0x0fffe;;
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} { .mfi
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// +1/2 in f10
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setf.exp f12 = r2
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// Step (1)
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// y0 = 1/sqrt(a) in f7
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frsqrta.s0 f7,p6=f8
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (2)
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// H0 = +1/2 * y0 in f9
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(p6) fma.s1 f9=f12,f7,f0
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (3)
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// S0 = a * y0 in f7
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(p6) fma.s1 f7=f8,f7,f0
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Make copy input x
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mov f13=f8
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nop.i 0
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} { .mfi
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nop.m 0
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fclass.m.unc p7,p8 = f8,0x3A
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (4)
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// d0 = 1/2 - S0 * H0 in f10
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(p6) fnma.s1 f10=f7,f9,f12
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nop.i 0;;
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}
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{ .mfi
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nop.m 0
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mov f15=f8
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (5)
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// H1 = H0 + d0 * H0 in f9
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(p6) fma.s1 f9=f10,f9,f9
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (6)
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// S1 = S0 + d0 * S0 in f7
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(p6) fma.s1 f7=f10,f7,f7
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (7)
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// d1 = 1/2 - S1 * H1 in f10
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(p6) fnma.s1 f10=f7,f9,f12
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (8)
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// H2 = H1 + d1 * H1 in f9
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(p6) fma.s1 f9=f10,f9,f9
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (9)
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// S2 = S1 + d1 * S1 in f7
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(p6) fma.s1 f7=f10,f7,f7
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (10)
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// d2 = 1/2 - S2 * H2 in f10
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(p6) fnma.s1 f10=f7,f9,f12
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (11)
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// e2 = a - S2 * S2 in f12
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(p6) fnma.s1 f12=f7,f7,f8
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (12)
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// S3 = S2 + d2 * S2 in f7
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(p6) fma.s1 f7=f12,f9,f7
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (13)
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// H3 = H2 + d2 * H2 in f9
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(p6) fma.s1 f9=f10,f9,f9
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (14)
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// e3 = a - S3 * S3 in f12
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(p6) fnma.s1 f12=f7,f7,f8
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nop.i 0;;
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} { .mfb
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nop.m 0
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// Step (15)
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// S = S3 + e3 * H3 in f7
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(p6) fma.s0 f8=f12,f9,f7
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(p6) br.ret.sptk b0 ;;
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}
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{ .mfb
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mov GR_Parameter_TAG = 48
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mov f8 = f7
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(p8) br.ret.sptk b0 ;;
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}
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//
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// This branch includes all those special values that are not negative,
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// with the result equal to frcpa(x)
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//
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// END DOUBLE EXTENDED PRECISION MINIMUM LATENCY SQUARE ROOT ALGORITHM
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GLOBAL_IEEE754_END(sqrtl)
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libm_alias_ldouble_other (__sqrt, sqrt)
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LOCAL_LIBM_ENTRY(__libm_error_region)
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.prologue
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{ .mfi
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add GR_Parameter_Y=-32,sp // Parameter 2 value
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nop.f 0
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.save ar.pfs,GR_SAVE_PFS
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mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
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}
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{ .mfi
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.fframe 64
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add sp=-64,sp // Create new stack
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nop.f 0
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mov GR_SAVE_GP=gp // Save gp
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};;
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{ .mmi
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stfe [GR_Parameter_Y] = FR_Y,16 // Save Parameter 2 on stack
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add GR_Parameter_X = 16,sp // Parameter 1 address
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.save b0, GR_SAVE_B0
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mov GR_SAVE_B0=b0 // Save b0
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};;
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.body
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{ .mib
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stfe [GR_Parameter_X] = FR_X // Store Parameter 1 on stack
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add GR_Parameter_RESULT = 0,GR_Parameter_Y
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nop.b 0 // Parameter 3 address
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}
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{ .mib
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stfe [GR_Parameter_Y] = FR_RESULT // Store Parameter 3 on stack
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add GR_Parameter_Y = -16,GR_Parameter_Y
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br.call.sptk b0=__libm_error_support# // Call error handling function
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};;
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{ .mmi
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nop.m 0
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nop.m 0
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add GR_Parameter_RESULT = 48,sp
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};;
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{ .mmi
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ldfe f8 = [GR_Parameter_RESULT] // Get return result off stack
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.restore sp
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add sp = 64,sp // Restore stack pointer
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mov b0 = GR_SAVE_B0 // Restore return address
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};;
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{ .mib
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mov gp = GR_SAVE_GP // Restore gp
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mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
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br.ret.sptk b0 // Return
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};;
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LOCAL_LIBM_END(__libm_error_region#)
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.type __libm_error_support#,@function
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.global __libm_error_support#
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