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aa1142c593
Continuing the preparation for additional _FloatN / _FloatNx function aliases, this patch makes ia64 libm function implementations use libm_alias_float to define function aliases. The same approach is followed as with the corresponding long double and double patches: the ia64-specific macros are left unchanged, with calls to libm_alias_float_other being added in most cases and libm_alias_float itself being used in only a few places. Tested with build-many-glibcs.py for ia64-linux-gnu that installed stripped shared libraries are unchanged by the patch. * sysdeps/ia64/fpu/libm-symbols.h: Include <libm-alias-float.h>. * sysdeps/ia64/fpu/e_acosf.S (acosf): Use libm_alias_float_other. * sysdeps/ia64/fpu/e_acoshf.S (acoshf): Likewise. * sysdeps/ia64/fpu/e_asinf.S (asinf): Likewise. * sysdeps/ia64/fpu/e_atan2f.S (atan2f): Likewise. * sysdeps/ia64/fpu/e_atanhf.S (atanhf): Likewise. * sysdeps/ia64/fpu/e_coshf.S (coshf): Likewise. * sysdeps/ia64/fpu/e_exp10f.S (exp10f): Likewise. * sysdeps/ia64/fpu/e_exp2f.S (exp2f): Likewise. * sysdeps/ia64/fpu/e_expf.S (expf): Likewise. * sysdeps/ia64/fpu/e_fmodf.S (fmodf): Likewise. * sysdeps/ia64/fpu/e_hypotf.S (hypotf): Likewise. * sysdeps/ia64/fpu/e_lgammaf_r.c (lgammaf_r): Define using libm_alias_float_r. * sysdeps/ia64/fpu/e_log2f.S (log2f): Use libm_alias_float_other. * sysdeps/ia64/fpu/e_logf.S (log10f): Likewise. (logf): Likewise. * sysdeps/ia64/fpu/e_powf.S (powf): Likewise. * sysdeps/ia64/fpu/e_remainderf.S (remainderf): Likewise. * sysdeps/ia64/fpu/e_sinhf.S (sinhf): Likewise. * sysdeps/ia64/fpu/e_sqrtf.S (sqrtf): Likewise. * sysdeps/ia64/fpu/libm_sincosf.S (sincosf): Likewise. * sysdeps/ia64/fpu/s_asinhf.S (asinhf): Likewise. * sysdeps/ia64/fpu/s_atanf.S (atanf): Likewise. * sysdeps/ia64/fpu/s_cbrtf.S (cbrtf): Likewise. * sysdeps/ia64/fpu/s_ceilf.S (ceilf): Likewise. * sysdeps/ia64/fpu/s_copysign.S (copysignf): Define using libm_alias_float. * sysdeps/ia64/fpu/s_cosf.S (sinf): Use libm_alias_float_other. (cosf): Likewise. * sysdeps/ia64/fpu/s_erfcf.S (erfcf): Likewise. * sysdeps/ia64/fpu/s_erff.S (erff): Likewise. * sysdeps/ia64/fpu/s_expm1f.S (expm1f): Likewise. * sysdeps/ia64/fpu/s_fabsf.S (fabsf): Likewise. * sysdeps/ia64/fpu/s_fdimf.S (fdimf): Likewise. * sysdeps/ia64/fpu/s_floorf.S (floorf): Likewise. * sysdeps/ia64/fpu/s_fmaf.S (fmaf): Likewise. * sysdeps/ia64/fpu/s_fmaxf.S (fmaxf): Likewise. * sysdeps/ia64/fpu/s_frexpf.c (frexpf): Likewise. * sysdeps/ia64/fpu/s_ldexpf.c (ldexpf): Likewise. * sysdeps/ia64/fpu/s_log1pf.S (log1pf): Likewise. * sysdeps/ia64/fpu/s_logbf.S (logbf): Likewise. * sysdeps/ia64/fpu/s_modff.S (modff): Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S (nearbyintf): Likewise. * sysdeps/ia64/fpu/s_nextafterf.S (nextafterf): Likewise. * sysdeps/ia64/fpu/s_rintf.S (rintf): Likewise. * sysdeps/ia64/fpu/s_roundf.S (roundf): Likewise. * sysdeps/ia64/fpu/s_scalblnf.c (scalblnf): Likewise. * sysdeps/ia64/fpu/s_scalbnf.c (scalbnf): Define using libm_alias_float. * sysdeps/ia64/fpu/s_tanf.S (tanf): Use libm_alias_float_other. * sysdeps/ia64/fpu/s_tanhf.S (tanhf): Likewise. * sysdeps/ia64/fpu/s_truncf.S (truncf): Likewise. * sysdeps/ia64/fpu/w_lgammaf_main.c [BUILD_LGAMMA && !USE_AS_COMPAT] (lgammaf): Likewise. * sysdeps/ia64/fpu/w_tgammaf_compat.S (tgammaf): Likewise.
231 lines
7.0 KiB
ArmAsm
231 lines
7.0 KiB
ArmAsm
.file "rintf.s"
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// Copyright (c) 2000 - 2003, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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//
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// History
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//==============================================================
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// 02/02/00 Initial version
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// 02/08/01 Corrected behavior for all rounding modes.
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// 05/20/02 Cleaned up namespace and sf0 syntax
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// 01/20/03 Improved performance
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//==============================================================
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// API
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//==============================================================
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// float rintf(float x)
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//==============================================================
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// general input registers:
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// r14 - r21
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rSignexp = r14
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rExp = r15
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rExpMask = r16
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rBigexp = r17
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rM1 = r18
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rFpsr = r19
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rRcs0 = r20
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rRcs0Mask = r21
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// floating-point registers:
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// f8 - f11
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fXInt = f9
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fNormX = f10
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fTmp = f11
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// predicate registers used:
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// p6 - p10
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// Overview of operation
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//==============================================================
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// float rintf(float x)
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// Return an integer value (represented as a float) that is x
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// rounded to integer in current rounding mode
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// Inexact is set if x != rint(x)
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//==============================================================
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// double_extended
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// if the exponent is > 1003e => 3F(true) = 63(decimal)
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// we have a significand of 64 bits 1.63-bits.
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// If we multiply by 2^63, we no longer have a fractional part
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// So input is an integer value already.
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// double
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// if the exponent is >= 10033 => 34(true) = 52(decimal)
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// 34 + 3ff = 433
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// we have a significand of 53 bits 1.52-bits. (implicit 1)
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// If we multiply by 2^52, we no longer have a fractional part
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// So input is an integer value already.
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// single
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// if the exponent is > 10016 => 17(true) = 23(decimal)
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// we have a significand of 24 bits 1.23-bits. (implicit 1)
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// If we multiply by 2^23, we no longer have a fractional part
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// So input is an integer value already.
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.section .text
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GLOBAL_IEEE754_ENTRY(rintf)
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{ .mfi
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getf.exp rSignexp = f8 // Get signexp, recompute if unorm
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fclass.m p7,p0 = f8, 0x0b // Test x unorm
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addl rBigexp = 0x10016, r0 // Set exponent at which is integer
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}
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{ .mfi
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mov rM1 = -1 // Set all ones
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fcvt.fx.s1 fXInt = f8 // Convert to int in significand
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mov rExpMask = 0x1FFFF // Form exponent mask
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}
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;;
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{ .mfi
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mov rFpsr = ar40 // Read fpsr -- check rc.s0
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fclass.m p6,p0 = f8, 0x1e3 // Test x natval, nan, inf
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nop.i 0
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}
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{ .mfb
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setf.sig fTmp = rM1 // Make const for setting inexact
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fnorm.s1 fNormX = f8 // Normalize input
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(p7) br.cond.spnt RINT_UNORM // Branch if x unorm
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}
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;;
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RINT_COMMON:
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// Return here from RINT_UNORM
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{ .mfb
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and rExp = rSignexp, rExpMask // Get biased exponent
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(p6) fma.s.s0 f8 = f8, f1, f0 // Result if x natval, nan, inf
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(p6) br.ret.spnt b0 // Exit if x natval, nan, inf
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}
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;;
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{ .mfi
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mov rRcs0Mask = 0x0c00 // Mask for rc.s0
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fcvt.xf f8 = fXInt // Result assume |x| < 2^23
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cmp.ge p7,p8 = rExp, rBigexp // Is |x| >= 2^23?
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}
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;;
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// We must correct result if |x| >= 2^23
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{ .mfi
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nop.m 0
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(p7) fma.s.s0 f8 = fNormX, f1, f0 // If |x| >= 2^23, result x
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nop.i 0
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}
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;;
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{ .mfi
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nop.m 0
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fcmp.eq.unc.s1 p0, p9 = f8, fNormX // Is result = x ?
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nop.i 0
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}
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{ .mfi
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nop.m 0
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(p8) fmerge.s f8 = fNormX, f8 // Make sure sign rint(x) = sign x
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nop.i 0
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}
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;;
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{ .mfi
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(p8) and rRcs0 = rFpsr, rRcs0Mask // Get rounding mode for sf0
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nop.f 0
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nop.i 0
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}
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;;
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// If |x| < 2^23 we must test for other rounding modes
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{ .mfi
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(p8) cmp.ne.unc p10,p0 = rRcs0, r0 // Test for other rounding modes
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(p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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nop.i 0
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}
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{ .mbb
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nop.m 0
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(p10) br.cond.spnt RINT_NOT_ROUND_NEAREST // Branch if not round nearest
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br.ret.sptk b0 // Exit main path if round nearest
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}
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;;
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RINT_UNORM:
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// Here if x unorm
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{ .mfb
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getf.exp rSignexp = fNormX // Get signexp, recompute if unorm
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fcmp.eq.s0 p7,p0 = f8, f0 // Dummy op to set denormal flag
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br.cond.sptk RINT_COMMON // Return to main path
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}
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;;
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RINT_NOT_ROUND_NEAREST:
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// Here if not round to nearest, and |x| < 2^23
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// Set rounding mode of s2 to that of s0, and repeat the conversion using s2
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{ .mfi
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nop.m 0
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fsetc.s2 0x7f, 0x40
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nop.i 0
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}
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;;
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{ .mfi
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nop.m 0
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fcvt.fx.s2 fXInt = fNormX // Convert to int in significand
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nop.i 0
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}
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;;
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{ .mfi
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nop.m 0
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fcvt.xf f8 = fXInt // Expected result
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nop.i 0
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}
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;;
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// Be sure sign of result = sign of input. Fixes cases where result is 0.
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{ .mfb
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nop.m 0
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fmerge.s f8 = fNormX, f8
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br.ret.sptk b0 // Exit main path
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}
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;;
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GLOBAL_IEEE754_END(rintf)
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libm_alias_float_other (__rint, rint)
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