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4372980f58
I've moved the TILE-Gx and TILEPro ports to the main sysdeps hierarchy,
along with the linux-generic ports infrastructure. Beyond the README
update, the move was just
git mv ports/sysdeps/tile sysdeps/tile
git mv ports/sysdeps/unix/sysv/linux/tile \
sysdeps/unix/sysv/linux/tile
git mv ports/sysdeps/unix/sysv/linux/generic \
sysdeps/unix/sysv/linux/generic
I updated the relevant ChangeLogs along the lines of the ARM move
in commit c6bfe5c4d7 and tested the 64-bit tilegx build to confirm that
there were no changes in "objdump -dr" output in the shared objects.
57 lines
1.8 KiB
C
57 lines
1.8 KiB
C
/* Copyright (C) 2011-2014 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Chris Metcalf <cmetcalf@tilera.com>, 2011.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "pthreadP.h"
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#include <arch/spr_def.h>
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#include <atomic.h>
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/* Bound point for bounded exponential backoff */
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#define BACKOFF_MAX 2048
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/* Initial cycle delay for exponential backoff */
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#define BACKOFF_START 32
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#ifdef __tilegx__
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/* Use cmpexch() after the initial fast-path exch to avoid
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invalidating the cache line of the lock holder. */
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# define TNS(p) atomic_exchange_acq((p), 1)
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# define CMPTNS(p) atomic_compare_and_exchange_val_acq((p), 1, 0)
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#else
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# define TNS(p) __insn_tns(p)
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# define CMPTNS(p) __insn_tns(p)
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# define SPR_CYCLE SPR_CYCLE_LOW /* The low 32 bits are sufficient. */
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#endif
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int
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pthread_spin_lock (pthread_spinlock_t *lock)
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{
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if (__builtin_expect (TNS (lock) != 0, 0))
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{
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unsigned int backoff = BACKOFF_START;
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while (CMPTNS (lock) != 0)
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{
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unsigned int start = __insn_mfspr (SPR_CYCLE);
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while (__insn_mfspr (SPR_CYCLE) - start < backoff)
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;
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if (backoff < BACKOFF_MAX)
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backoff *= 2;
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}
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}
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return 0;
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}
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