mirror of
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2004-12-29 Jakub Jelinek <jakub@redhat.com> * sysdeps/ia64/fpu/libm_support.h (__libm_error_support): Use libc_hidden_proto instead of HIDDEN_PROTO. * sysdeps/ia64/fpu/libm-symbols.h (HIDDEN_PROTO): Remove. (__libm_error_support): If ASSEMBLER and in libc, define to HIDDEN_JUMPTARGET(__libm_error_support). 2004-12-28 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/Makefile (duplicated-routines): New macro. (sysdep_routines): Replace libm_ldexp{,f,l} and libm_scalbn{,f,l} with $(duplicated-routines). (libm-sysdep_routines): Likewise, but substitute "s_" prefix for "m_" prefix. 2004-12-27 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/libm-symbols.h: Add include of <sysdep.h> and undefine "ret" macro. Add __libm_error_support hidden definitions. * sysdeps/ia64/fpu/e_lgamma_r.c: Remove CVS-id comment. Add missing portion of copyright statement. * sysdeps/ia64/fpu/e_lgammaf_r.c: Likewise. * sysdeps/ia64/fpu/e_lgammal_r.c: Likewise. * sysdeps/ia64/fpu/w_lgamma.c: Remove CVS-id comment. Add missing portion of copyright statement. (__ieee754_lgamma): Rename from lgamma(). Make lgamma() a weak alias. (__ieee754_gamma): Likewise. * sysdeps/ia64/fpu/w_lgammaf.c: Likewise. * sysdeps/ia64/fpu/w_lgammal.c: Likewise. 2004-12-09 H. J. Lu <hjl@lucon.org> * sysdeps/ia64/fpu/s_nextafterl.c: Remove. * sysdeps/ia64/fpu/s_nexttoward.c: Likewise. * sysdeps/ia64/fpu/s_nexttowardf.c: Likewise. * sysdeps/ia64/fpu/e_atan2l.S: Remove (duplicate of e_atan2l.c). * sysdeps/ia64/fpu/e_expl.S: Likewise. * sysdeps/ia64/fpu/e_logl.c: Remove (conflicts with e_logl.S). 2004-11-18 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/README: New file. * sysdeps/ia64/fpu/gen_import_file_list: New file. * sysdeps/ia64/fpu/import_check: Likewise. * sysdeps/ia64/fpu/import_diffs: Likewise. * sysdeps/ia64/fpu/import_file.awk: Likewise. * sysdeps/ia64/fpu/import_intel_libm: Likewise. * sysdeps/ia64/fpu/libm-symbols.h: Likewise. * sysdeps/ia64/fpu/e_acos.S: Update from Intel libm v2.1+. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_log2.S: Likewise. * sysdeps/ia64/fpu/e_log2f.S: Likewise. * sysdeps/ia64/fpu/e_log2l.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_reduce.c: Likewise. * sysdeps/ia64/fpu/libm_support.h: Likewise. * sysdeps/ia64/fpu/s_atan.S: Likewise. * sysdeps/ia64/fpu/s_atanf.S: Likewise. * sysdeps/ia64/fpu/s_atanl.S: Likewise. * sysdeps/ia64/fpu/s_cbrt.S: Likewise. * sysdeps/ia64/fpu/s_cbrtf.S: Likewise. * sysdeps/ia64/fpu/s_cbrtl.S: Likewise. * sysdeps/ia64/fpu/s_ceil.S: Likewise. * sysdeps/ia64/fpu/s_ceilf.S: Likewise. * sysdeps/ia64/fpu/s_ceill.S: Likewise. * sysdeps/ia64/fpu/s_cos.S: Likewise. * sysdeps/ia64/fpu/s_cosf.S: Likewise. * sysdeps/ia64/fpu/s_cosl.S: Likewise. * sysdeps/ia64/fpu/s_expm1.S: Likewise. * sysdeps/ia64/fpu/s_expm1f.S: Likewise. * sysdeps/ia64/fpu/s_expm1l.S: Likewise. * sysdeps/ia64/fpu/s_fabs.S: Likewise. * sysdeps/ia64/fpu/s_fabsf.S: Likewise. * sysdeps/ia64/fpu/s_fabsl.S: Likewise. * sysdeps/ia64/fpu/s_floor.S: Likewise. * sysdeps/ia64/fpu/s_floorf.S: Likewise. * sysdeps/ia64/fpu/s_floorl.S: Likewise. * sysdeps/ia64/fpu/s_frexp.c: Likewise. * sysdeps/ia64/fpu/s_frexpf.c: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ia64/fpu/e_acosh.S: New file from Intel libm v2.1+. * sysdeps/ia64/fpu/e_acoshf.S: Likewise. * sysdeps/ia64/fpu/e_acoshl.S: Likewise. * sysdeps/ia64/fpu/e_atanh.S: Likewise. * sysdeps/ia64/fpu/e_atanhf.S: Likewise. * sysdeps/ia64/fpu/e_atanhl.S: Likewise. * sysdeps/ia64/fpu/e_exp10.S: Likewise. * sysdeps/ia64/fpu/e_exp10f.S: Likewise. * sysdeps/ia64/fpu/e_exp10l.S: Likewise. * sysdeps/ia64/fpu/e_exp2.S: Likewise. * sysdeps/ia64/fpu/e_exp2f.S: Likewise. * sysdeps/ia64/fpu/e_exp2l.S: Likewise. * sysdeps/ia64/fpu/e_lgamma_r.S: Likewise. * sysdeps/ia64/fpu/e_lgammaf_r.S: Likewise. * sysdeps/ia64/fpu/e_lgammal_r.S: Likewise. * sysdeps/ia64/fpu/e_logl.S: Likewise. * sysdeps/ia64/fpu/libm_frexp.S: Likewise. * sysdeps/ia64/fpu/libm_frexpf.S: Likewise. * sysdeps/ia64/fpu/libm_frexpl.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbnl.S: Likewise. * sysdeps/ia64/fpu/libm_lgamma.S: Likewise. * sysdeps/ia64/fpu/libm_lgammaf.S: Likewise. * sysdeps/ia64/fpu/libm_lgammal.S: Likewise. * sysdeps/ia64/fpu/libm_sincos.S: Likewise. * sysdeps/ia64/fpu/libm_sincos_large.S: Likewise. * sysdeps/ia64/fpu/libm_sincosf.S: Likewise. * sysdeps/ia64/fpu/libm_sincosl.S: Likewise. * sysdeps/ia64/fpu/libm_scalblnf.S: Likewise. * sysdeps/ia64/fpu/s_asinh.S: Likewise. * sysdeps/ia64/fpu/s_asinhf.S: Likewise. * sysdeps/ia64/fpu/s_asinhl.S: Likewise. * sysdeps/ia64/fpu/s_erf.S: Likewise. * sysdeps/ia64/fpu/s_erfc.S: Likewise. * sysdeps/ia64/fpu/s_erfcf.S: Likewise. * sysdeps/ia64/fpu/s_erfcl.S: Likewise. * sysdeps/ia64/fpu/s_erff.S: Likewise. * sysdeps/ia64/fpu/s_erfl.S: Likewise. * sysdeps/ia64/fpu/s_fdim.S: Likewise. * sysdeps/ia64/fpu/s_fdimf.S: Likewise. * sysdeps/ia64/fpu/s_fdiml.S: Likewise. * sysdeps/ia64/fpu/s_fma.S: Likewise. * sysdeps/ia64/fpu/s_fmaf.S: Likewise. * sysdeps/ia64/fpu/s_fmal.S: Likewise. * sysdeps/ia64/fpu/s_fmax.S: Likewise. * sysdeps/ia64/fpu/s_fmaxf.S: Likewise. * sysdeps/ia64/fpu/s_fmaxl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.c: Likewise. * sysdeps/ia64/fpu/s_ldexpf.c: Likewise. * sysdeps/ia64/fpu/s_ldexpl.c: Likewise. * sysdeps/ia64/fpu/s_nextafter.S: Likewise. * sysdeps/ia64/fpu/s_nextafterf.S: Likewise. * sysdeps/ia64/fpu/s_nextafterl.S: Likewise. * sysdeps/ia64/fpu/s_nexttoward.S: Likewise. * sysdeps/ia64/fpu/s_nexttowardf.S: Likewise. * sysdeps/ia64/fpu/s_nexttowardl.S: Likewise. * sysdeps/ia64/fpu/s_tanh.S: Likewise. * sysdeps/ia64/fpu/s_tanhf.S: Likewise. * sysdeps/ia64/fpu/s_tanhl.S: Likewise. * sysdeps/ia64/fpu/s_scalblnf.c: Likewise. * sysdeps/ia64/fpu/w_lgamma.c: Likewise. * sysdeps/ia64/fpu/w_lgammaf.c: Likewise. * sysdeps/ia64/fpu/w_lgammal.c: Likewise. * sysdeps/ia64/fpu/w_tgamma.S: Likewise. * sysdeps/ia64/fpu/w_tgammaf.S: Likewise. * sysdeps/ia64/fpu/w_tgammal.S: Likewise. * sysdeps/ia64/fpu/e_gamma_r.c: New empty dummy-file. * sysdeps/ia64/fpu/e_gammaf_r.c: Likewise. * sysdeps/ia64/fpu/e_gammal_r.c: Likewise. * sysdeps/ia64/fpu/w_acosh.c: Likewise. * sysdeps/ia64/fpu/w_acoshf.c: Likewise. * sysdeps/ia64/fpu/w_acoshl.c: Likewise. * sysdeps/ia64/fpu/w_atanh.c: Likewise. * sysdeps/ia64/fpu/w_atanhf.c: Likewise. * sysdeps/ia64/fpu/w_atanhl.c: Likewise. * sysdeps/ia64/fpu/w_exp10.c: Likewise. * sysdeps/ia64/fpu/w_exp10f.c: Likewise. * sysdeps/ia64/fpu/w_exp10l.c: Likewise. * sysdeps/ia64/fpu/w_exp2.c: Likewise. * sysdeps/ia64/fpu/w_exp2f.c: Likewise. * sysdeps/ia64/fpu/w_exp2l.c: Likewise. * sysdeps/ia64/fpu/w_expl.c: Likewise. * sysdeps/ia64/fpu/e_expl.S: Likewise. * sysdeps/ia64/fpu/w_lgamma_r.c: Likewise. * sysdeps/ia64/fpu/w_lgammaf_r.c: Likewise. * sysdeps/ia64/fpu/w_lgammal_r.c: Likewise. * sysdeps/ia64/fpu/w_log2.c: Likewise. * sysdeps/ia64/fpu/w_log2f.c: Likewise. * sysdeps/ia64/fpu/w_log2l.c: Likewise. * sysdeps/ia64/fpu/w_sinh.c: Likewise. * sysdeps/ia64/fpu/w_sinhf.c: Likewise. * sysdeps/ia64/fpu/w_sinhl.c: Likewise. * sysdeps/ia64/fpu/libm_atan2_reg.S: Remove. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_sincos.c: Make it an empty dummy-file. * sysdeps/ia64/fpu/s_sincosf.c: Likewise. * sysdeps/ia64/fpu/s_sincosl.c: Likewise. * sysdeps/ia64/fpu/e_atan2l.S: Add "Not needed" comment. * sysdeps/ia64/fpu/s_copysign.S: Add __libm_copysign{,f,l} alias for use by libm_error.c * sysdeps/ia64/fpu/Makefile (libm-sysdep_routines): Remove libm_atan2_reg, libm_tan, libm_frexp4{f,l}. Mention s_erfc{,f,l}, libm_frexp{,f,l}, libm_ldexp{,f,l}, libm_sincos{,f,l}, libm_sincos_large, libm_lgamma{,f,l}, libm_scalbn{,f,l}, libm_scalblnf. (sysdep_routines): Remove libm_frexp4{,f,l}. Mention libm_frexp{,f,l}, libm_ldexp{,f,l}, and libm_scalbn{,f,l}. (sysdep-CPPFLAGS): Add -include libm-symbols.h, -D__POSIX__, _D_LIB_VERSIONIMF=_LIB_VERSION, -DSIZE_LONG_INT_64, and -DSIZE_LONG_LONG_INT_64.
556 lines
15 KiB
ArmAsm
556 lines
15 KiB
ArmAsm
.file "atanf.s"
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// Copyright (c) 2000 - 2003, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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// History
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//==============================================================
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// 02/20/00 Initial version
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// 08/17/00 Changed predicate register macro-usage to direct predicate
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// names due to an assembler bug.
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// 02/06/02 Corrected .section statement
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// 05/20/02 Cleaned up namespace and sf0 syntax
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// 02/06/03 Reordered header: .section, .global, .proc, .align;
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// added missing bundling
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//
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// Assembly macros
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//==============================================================
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// integer registers used
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EXP_Addr1 = r33
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EXP_Addr2 = r34
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// floating point registers used
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atanf_coeff_R4 = f32
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atanf_coeff_R5 = f33
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atanf_coeff_R1 = f34
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atanf_coeff_R2 = f35
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atanf_coeff_R3 = f36
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atanf_coeff_P1 = f37
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atanf_coeff_Q6 = f38
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atanf_coeff_Q7 = f39
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atanf_coeff_Q8 = f40
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atanf_coeff_Q9 = f41
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atanf_coeff_Q4 = f42
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atanf_coeff_Q5 = f43
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atanf_coeff_Q2 = f44
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atanf_coeff_Q3 = f45
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atanf_coeff_P5 = f46
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atanf_coeff_P6 = f47
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atanf_coeff_Q0 = f48
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atanf_coeff_Q1 = f49
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atanf_coeff_P7 = f50
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atanf_coeff_P8 = f51
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atanf_coeff_P3 = f52
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atanf_coeff_P4 = f53
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atanf_coeff_P9 = f54
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atanf_coeff_P10 = f55
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atanf_coeff_P2 = f56
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atanf_piby2 = f57
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atanf_z = f58
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atanf_b = f59
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atanf_zsq = f60
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atanf_sgn_x = f61
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atanf_sgnx_piby2 = f62
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atanf_abs_x = f63
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atanf_t = f64
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atanf_xcub = f65
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atanf_tsq = f66
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atanf_t4 = f67
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atanf_x5 = f68
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atanf_x6 = f69
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atanf_x11 = f70
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atanf_poly_p1 = f71
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atanf_poly_p2 = f72
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atanf_poly_p3 = f73
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atanf_poly_p4 = f74
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atanf_poly_p5 = f75
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atanf_poly_q1 = f76
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atanf_poly_q2 = f77
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atanf_poly_q3 = f78
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atanf_poly_q4 = f79
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atanf_poly_q5 = f80
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atanf_poly_q = f81
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atanf_poly_r1 = f81
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atanf_poly_r2 = f82
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atanf_poly_r3 = f83
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atanf_bsq = f84
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atanf_z4 = f85
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atanf_z5 = f86
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atanf_z8 = f87
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atanf_z13 = f88
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atanf_poly_r2 = f89
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atanf_poly_r1 = f90
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atanf_z8_bsq = f91
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atanf_poly_r = f92
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atanf_z21_poly_r = f93
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atanf_answer = f8
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// predicate registers used
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//atanf_pred_LE1 = p6
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//atanf_pred_GT1 = p7
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RODATA
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.align 16
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LOCAL_OBJECT_START(atanf_coeff_1_table)
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data8 0x40c4c241be751ff2 // r4
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data8 0x40e9f300c2f3070b // r5
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data8 0x409babffef772075 // r3
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data8 0xbfd5555512191621 // p1
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data8 0x3fc9997e7afbff4e // p2 = q8
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data8 0xbfd5555512191621 // p1 = q9
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data8 0x3f97105b4160f86b // p8 = q2
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data8 0xbfa6e10ba401393f // p7 = q3
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data8 0x3f522e5d33bc9baa // p10 = q0
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data8 0xbf7deaadaa336451 // p9 = q1
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data8 0xbfc2473c5145ee38 // p3
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data8 0x3fbc4f512b1865f5 // p4
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data8 0x3fc9997e7afbff4e // p2
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data8 0x3ff921fb54442d18 // pi/2
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LOCAL_OBJECT_END(atanf_coeff_1_table)
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LOCAL_OBJECT_START(atanf_coeff_2_table)
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data8 0x4035000000004284 // r1
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data8 0x406cdffff336a59b // r2
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|
data8 0x3fbc4f512b1865f5 // p4 = q6
|
|
data8 0xbfc2473c5145ee38 // p3 = q7
|
|
data8 0x3fb142a73d7c54e3 // p6 = q4
|
|
data8 0xbfb68eed6a8cfa32 // p5 = q5
|
|
data8 0xbfb68eed6a8cfa32 // p5
|
|
data8 0x3fb142a73d7c54e3 // p6
|
|
data8 0xbfa6e10ba401393f // p7
|
|
data8 0x3f97105b4160f86b // p8
|
|
data8 0xbf7deaadaa336451 // p9
|
|
data8 0x3f522e5d33bc9baa // p10
|
|
LOCAL_OBJECT_END(atanf_coeff_2_table)
|
|
|
|
|
|
|
|
.section .text
|
|
GLOBAL_LIBM_ENTRY(atanf)
|
|
|
|
{ .mfi
|
|
alloc r32 = ar.pfs,1,2,0,0
|
|
frcpa.s1 atanf_z,p0 = f1,f8
|
|
addl EXP_Addr2 = @ltoff(atanf_coeff_2_table),gp
|
|
}
|
|
{ .mfi
|
|
addl EXP_Addr1 = @ltoff(atanf_coeff_1_table),gp
|
|
fma.s1 atanf_t = f8,f8,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fmerge.s atanf_sgn_x = f8,f1
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
ld8 EXP_Addr1 = [EXP_Addr1]
|
|
fmerge.s atanf_abs_x = f1,f8
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
ld8 EXP_Addr2 = [EXP_Addr2]
|
|
nop.f 999
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fclass.m p8,p0 = f8,0x7 // @zero
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fcmp.eq.unc.s0 p9,p10 = f8,f1
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
ldfpd atanf_coeff_R4,atanf_coeff_R5 = [EXP_Addr1],16
|
|
fnma.s1 atanf_b = f8,atanf_z,f1
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
ldfpd atanf_coeff_R1,atanf_coeff_R2 = [EXP_Addr2],16
|
|
fma.s1 atanf_zsq = atanf_z,atanf_z,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
ldfpd atanf_coeff_R3,atanf_coeff_P1 = [EXP_Addr1],16
|
|
fma.s1 atanf_xcub = f8,atanf_t,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
ldfpd atanf_coeff_Q6,atanf_coeff_Q7 = [EXP_Addr2],16
|
|
fma.s1 atanf_tsq = atanf_t,atanf_t,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
ldfpd atanf_coeff_Q8,atanf_coeff_Q9 = [EXP_Addr1],16
|
|
// fcmp.le.s1 atanf_pred_LE1,atanf_pred_GT1 = atanf_abs_x,f1
|
|
fcmp.le.s1 p6,p7 = atanf_abs_x,f1
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
ldfpd atanf_coeff_Q4,atanf_coeff_Q5 = [EXP_Addr2],16
|
|
nop.f 999
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
ldfpd atanf_coeff_Q2,atanf_coeff_Q3 = [EXP_Addr1],16
|
|
fclass.m p8,p0 = f8,0xe7 // @inf|@qnan|@snan|@zero
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
ldfpd atanf_coeff_P5,atanf_coeff_P6 = [EXP_Addr2],16
|
|
nop.f 999
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
ldfpd atanf_coeff_Q0,atanf_coeff_Q1 = [EXP_Addr1],16
|
|
nop.f 999
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
ldfpd atanf_coeff_P7,atanf_coeff_P8 = [EXP_Addr2],16
|
|
nop.f 999
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
ldfpd atanf_coeff_P3,atanf_coeff_P4 = [EXP_Addr1],16
|
|
fma.s1 atanf_bsq = atanf_b,atanf_b,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
ldfpd atanf_coeff_P9,atanf_coeff_P10 = [EXP_Addr2]
|
|
fma.s1 atanf_z4 = atanf_zsq,atanf_zsq,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
ldfpd atanf_coeff_P2,atanf_piby2 = [EXP_Addr1]
|
|
fma.s1 atanf_x6 = atanf_t,atanf_tsq,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_t4 = atanf_tsq,atanf_tsq,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
fma.s1 atanf_x5 = atanf_t,atanf_xcub,f0
|
|
(p8) br.cond.spnt ATANF_X_INF_NAN_ZERO
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_r1 = atanf_b,atanf_coeff_R1,f1
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_r3 = atanf_b,atanf_coeff_R5,atanf_coeff_R4
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_r2 = atanf_b,atanf_coeff_R3,atanf_coeff_R2
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_z8 = atanf_z4,atanf_z4,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q2 = atanf_t,atanf_coeff_Q5,atanf_coeff_Q4
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q3 = atanf_t,atanf_coeff_Q7,atanf_coeff_Q6
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_z5 = atanf_z,atanf_z4,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q1 = atanf_t,atanf_coeff_Q9,atanf_coeff_Q8
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q4 = atanf_t,atanf_coeff_Q1,atanf_coeff_Q0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q5 = atanf_t,atanf_coeff_Q3,atanf_coeff_Q2
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p4 = f8,atanf_coeff_P1,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p5 = atanf_t,atanf_coeff_P4,atanf_coeff_P3
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_r1 = atanf_z8,atanf_poly_r1,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_z8_bsq = atanf_z8,atanf_bsq,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q2 = atanf_tsq,atanf_poly_q3,atanf_poly_q2
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_r2 = atanf_bsq,atanf_poly_r3,atanf_poly_r2
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p2 = atanf_t,atanf_coeff_P8,atanf_coeff_P7
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q1 = atanf_poly_q1,f1,atanf_tsq
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_z13 = atanf_z5,atanf_z8,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p1 = atanf_t,atanf_coeff_P10,atanf_coeff_P9
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p4 = atanf_t,atanf_poly_p4,f8
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q4 = atanf_tsq,atanf_poly_q5,atanf_poly_q4
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p3 = atanf_t,atanf_coeff_P6,atanf_coeff_P5
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p5 = atanf_t,atanf_poly_p5,atanf_coeff_P2
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_x11 = atanf_x5,atanf_x6,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_r = atanf_z8_bsq,atanf_poly_r2,atanf_poly_r1
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s0 atanf_sgnx_piby2 = atanf_sgn_x,atanf_piby2,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q2 = atanf_t4,atanf_poly_q1,atanf_poly_q2
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p1 = atanf_tsq,atanf_poly_p1,atanf_poly_p2
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p4 = atanf_x5,atanf_poly_p5,atanf_poly_p4
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_z21_poly_r = atanf_z13,atanf_poly_r,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q = atanf_t4,atanf_poly_q2,atanf_poly_q4
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p1 = atanf_tsq,atanf_poly_p1,atanf_poly_p3
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
//(atanf_pred_GT1) fnma.s atanf_answer = atanf_poly_q,atanf_z21_poly_r,atanf_sgnx_piby2
|
|
(p7) fnma.s.s0 atanf_answer = atanf_poly_q,atanf_z21_poly_r,atanf_sgnx_piby2
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
//(atanf_pred_LE1) fma.s atanf_answer = atanf_x11,atanf_poly_p1,atanf_poly_p4
|
|
(p6) fma.s.s0 atanf_answer = atanf_x11,atanf_poly_p1,atanf_poly_p4
|
|
br.ret.sptk b0
|
|
}
|
|
|
|
|
|
|
|
ATANF_X_INF_NAN_ZERO:
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fclass.m p8,p9 = f8,0x23 // @inf
|
|
nop.i 0
|
|
}
|
|
;;
|
|
{ .mfi
|
|
nop.m 0
|
|
(p8) fmerge.s f8 = f8, atanf_piby2
|
|
nop.i 0
|
|
}
|
|
;;
|
|
{ .mfb
|
|
nop.m 0
|
|
fnorm.s.s0 f8 = f8
|
|
br.ret.sptk b0
|
|
}
|
|
;;
|
|
|
|
GLOBAL_LIBM_END(atanf)
|