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b6a02c3606
1. Refactor files so that all implementations are in the multiarch
directory
- Moved the implementation portion of memmove sse2 from memmove.S
to multiarch/memmove-sse2.S
- The non-multiarch file now only includes one of the
implementations in the multiarch directory based on the compiled
ISA level (only used for non-multiarch builds. Otherwise we go
through the ifunc selector).
2. Add ISA level build guards to different implementations.
- I.e memmove-avx2-unaligned-erms.S which is ISA level 3 will only
build if compiled ISA level <= 3. Otherwise there is no reason
to include it as we will always use one of the ISA level 4
implementations (memmove-evex-unaligned-erms.S).
3. Add new multiarch/rtld-memmove.S that just include the
non-multiarch memmove.S which will in turn select the best
implementation based on the compiled ISA level.
4. Refactor the ifunc selector and ifunc implementation list to use
the ISA level aware wrapper macros that allow functions below the
compiled ISA level (with a guranteed replacement) to be skipped.
Tested with and without multiarch on x86_64 for ISA levels:
{generic, x86-64-v2, x86-64-v3, x86-64-v4}
And m32 with and without multiarch.
isa raising memmove
421 lines
9.8 KiB
ArmAsm
421 lines
9.8 KiB
ArmAsm
/* memmove/memcpy/mempcpy optimized with AVX512 for KNL hardware.
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Copyright (C) 2016-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <isa-level.h>
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#if ISA_SHOULD_BUILD (4)
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# include "asm-syntax.h"
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.section .text.avx512,"ax",@progbits
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ENTRY (__mempcpy_chk_avx512_no_vzeroupper)
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cmp %RDX_LP, %RCX_LP
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jb HIDDEN_JUMPTARGET (__chk_fail)
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END (__mempcpy_chk_avx512_no_vzeroupper)
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ENTRY (__mempcpy_avx512_no_vzeroupper)
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mov %RDI_LP, %RAX_LP
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add %RDX_LP, %RAX_LP
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jmp L(start)
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END (__mempcpy_avx512_no_vzeroupper)
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ENTRY (__memmove_chk_avx512_no_vzeroupper)
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cmp %RDX_LP, %RCX_LP
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jb HIDDEN_JUMPTARGET (__chk_fail)
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END (__memmove_chk_avx512_no_vzeroupper)
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ENTRY (__memmove_avx512_no_vzeroupper)
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mov %RDI_LP, %RAX_LP
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# ifdef USE_AS_MEMPCPY
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add %RDX_LP, %RAX_LP
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# endif
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L(start):
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# ifdef __ILP32__
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/* Clear the upper 32 bits. */
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mov %edx, %edx
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# endif
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lea (%rsi, %rdx), %rcx
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lea (%rdi, %rdx), %r9
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cmp $512, %rdx
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ja L(512bytesormore)
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L(check):
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cmp $16, %rdx
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jbe L(less_16bytes)
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cmp $256, %rdx
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jb L(less_256bytes)
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vmovups (%rsi), %zmm0
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vmovups 0x40(%rsi), %zmm1
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vmovups 0x80(%rsi), %zmm2
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vmovups 0xC0(%rsi), %zmm3
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vmovups -0x100(%rcx), %zmm4
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vmovups -0xC0(%rcx), %zmm5
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vmovups -0x80(%rcx), %zmm6
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vmovups -0x40(%rcx), %zmm7
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vmovups %zmm0, (%rdi)
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vmovups %zmm1, 0x40(%rdi)
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vmovups %zmm2, 0x80(%rdi)
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vmovups %zmm3, 0xC0(%rdi)
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vmovups %zmm4, -0x100(%r9)
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vmovups %zmm5, -0xC0(%r9)
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vmovups %zmm6, -0x80(%r9)
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vmovups %zmm7, -0x40(%r9)
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ret
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L(less_256bytes):
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cmp $128, %dl
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jb L(less_128bytes)
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vmovups (%rsi), %zmm0
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vmovups 0x40(%rsi), %zmm1
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vmovups -0x80(%rcx), %zmm2
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vmovups -0x40(%rcx), %zmm3
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vmovups %zmm0, (%rdi)
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vmovups %zmm1, 0x40(%rdi)
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vmovups %zmm2, -0x80(%r9)
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vmovups %zmm3, -0x40(%r9)
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ret
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L(less_128bytes):
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cmp $64, %dl
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jb L(less_64bytes)
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vmovdqu (%rsi), %ymm0
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vmovdqu 0x20(%rsi), %ymm1
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vmovdqu -0x40(%rcx), %ymm2
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vmovdqu -0x20(%rcx), %ymm3
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vmovdqu %ymm0, (%rdi)
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vmovdqu %ymm1, 0x20(%rdi)
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vmovdqu %ymm2, -0x40(%r9)
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vmovdqu %ymm3, -0x20(%r9)
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ret
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L(less_64bytes):
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cmp $32, %dl
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jb L(less_32bytes)
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vmovdqu (%rsi), %ymm0
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vmovdqu -0x20(%rcx), %ymm1
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vmovdqu %ymm0, (%rdi)
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vmovdqu %ymm1, -0x20(%r9)
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ret
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L(less_32bytes):
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vmovdqu (%rsi), %xmm0
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vmovdqu -0x10(%rcx), %xmm1
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vmovdqu %xmm0, (%rdi)
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vmovdqu %xmm1, -0x10(%r9)
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ret
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L(less_16bytes):
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cmp $8, %dl
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jb L(less_8bytes)
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movq (%rsi), %rsi
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movq -0x8(%rcx), %rcx
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movq %rsi, (%rdi)
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movq %rcx, -0x8(%r9)
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ret
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L(less_8bytes):
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cmp $4, %dl
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jb L(less_4bytes)
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mov (%rsi), %esi
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mov -0x4(%rcx), %ecx
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mov %esi, (%rdi)
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mov %ecx, -0x4(%r9)
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ret
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L(less_4bytes):
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cmp $2, %dl
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jb L(less_2bytes)
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mov (%rsi), %si
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mov -0x2(%rcx), %cx
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mov %si, (%rdi)
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mov %cx, -0x2(%r9)
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ret
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L(less_2bytes):
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cmp $1, %dl
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jb L(less_1bytes)
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mov (%rsi), %cl
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mov %cl, (%rdi)
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L(less_1bytes):
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ret
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L(512bytesormore):
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# ifdef SHARED_CACHE_SIZE_HALF
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mov $SHARED_CACHE_SIZE_HALF, %r8
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# else
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mov __x86_shared_cache_size_half(%rip), %r8
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# endif
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cmp %r8, %rdx
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jae L(preloop_large)
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cmp $1024, %rdx
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ja L(1024bytesormore)
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prefetcht1 (%rsi)
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prefetcht1 0x40(%rsi)
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prefetcht1 0x80(%rsi)
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prefetcht1 0xC0(%rsi)
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prefetcht1 0x100(%rsi)
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prefetcht1 0x140(%rsi)
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prefetcht1 0x180(%rsi)
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prefetcht1 0x1C0(%rsi)
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prefetcht1 -0x200(%rcx)
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prefetcht1 -0x1C0(%rcx)
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prefetcht1 -0x180(%rcx)
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prefetcht1 -0x140(%rcx)
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prefetcht1 -0x100(%rcx)
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prefetcht1 -0xC0(%rcx)
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prefetcht1 -0x80(%rcx)
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prefetcht1 -0x40(%rcx)
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vmovups (%rsi), %zmm0
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vmovups 0x40(%rsi), %zmm1
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vmovups 0x80(%rsi), %zmm2
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vmovups 0xC0(%rsi), %zmm3
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vmovups 0x100(%rsi), %zmm4
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vmovups 0x140(%rsi), %zmm5
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vmovups 0x180(%rsi), %zmm6
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vmovups 0x1C0(%rsi), %zmm7
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vmovups -0x200(%rcx), %zmm8
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vmovups -0x1C0(%rcx), %zmm9
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vmovups -0x180(%rcx), %zmm10
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vmovups -0x140(%rcx), %zmm11
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vmovups -0x100(%rcx), %zmm12
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vmovups -0xC0(%rcx), %zmm13
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vmovups -0x80(%rcx), %zmm14
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vmovups -0x40(%rcx), %zmm15
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vmovups %zmm0, (%rdi)
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vmovups %zmm1, 0x40(%rdi)
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vmovups %zmm2, 0x80(%rdi)
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vmovups %zmm3, 0xC0(%rdi)
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vmovups %zmm4, 0x100(%rdi)
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vmovups %zmm5, 0x140(%rdi)
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vmovups %zmm6, 0x180(%rdi)
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vmovups %zmm7, 0x1C0(%rdi)
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vmovups %zmm8, -0x200(%r9)
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vmovups %zmm9, -0x1C0(%r9)
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vmovups %zmm10, -0x180(%r9)
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vmovups %zmm11, -0x140(%r9)
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vmovups %zmm12, -0x100(%r9)
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vmovups %zmm13, -0xC0(%r9)
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vmovups %zmm14, -0x80(%r9)
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vmovups %zmm15, -0x40(%r9)
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ret
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L(1024bytesormore):
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cmp %rsi, %rdi
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ja L(1024bytesormore_bkw)
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sub $512, %r9
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vmovups -0x200(%rcx), %zmm8
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vmovups -0x1C0(%rcx), %zmm9
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vmovups -0x180(%rcx), %zmm10
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vmovups -0x140(%rcx), %zmm11
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vmovups -0x100(%rcx), %zmm12
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vmovups -0xC0(%rcx), %zmm13
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vmovups -0x80(%rcx), %zmm14
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vmovups -0x40(%rcx), %zmm15
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prefetcht1 (%rsi)
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prefetcht1 0x40(%rsi)
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prefetcht1 0x80(%rsi)
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prefetcht1 0xC0(%rsi)
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prefetcht1 0x100(%rsi)
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prefetcht1 0x140(%rsi)
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prefetcht1 0x180(%rsi)
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prefetcht1 0x1C0(%rsi)
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/* Loop with unaligned memory access. */
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L(gobble_512bytes_loop):
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vmovups (%rsi), %zmm0
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vmovups 0x40(%rsi), %zmm1
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vmovups 0x80(%rsi), %zmm2
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vmovups 0xC0(%rsi), %zmm3
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vmovups 0x100(%rsi), %zmm4
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vmovups 0x140(%rsi), %zmm5
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vmovups 0x180(%rsi), %zmm6
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vmovups 0x1C0(%rsi), %zmm7
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add $512, %rsi
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prefetcht1 (%rsi)
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prefetcht1 0x40(%rsi)
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prefetcht1 0x80(%rsi)
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prefetcht1 0xC0(%rsi)
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prefetcht1 0x100(%rsi)
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prefetcht1 0x140(%rsi)
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prefetcht1 0x180(%rsi)
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prefetcht1 0x1C0(%rsi)
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vmovups %zmm0, (%rdi)
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vmovups %zmm1, 0x40(%rdi)
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vmovups %zmm2, 0x80(%rdi)
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vmovups %zmm3, 0xC0(%rdi)
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vmovups %zmm4, 0x100(%rdi)
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vmovups %zmm5, 0x140(%rdi)
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vmovups %zmm6, 0x180(%rdi)
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vmovups %zmm7, 0x1C0(%rdi)
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add $512, %rdi
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cmp %r9, %rdi
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jb L(gobble_512bytes_loop)
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vmovups %zmm8, (%r9)
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vmovups %zmm9, 0x40(%r9)
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vmovups %zmm10, 0x80(%r9)
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vmovups %zmm11, 0xC0(%r9)
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vmovups %zmm12, 0x100(%r9)
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vmovups %zmm13, 0x140(%r9)
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vmovups %zmm14, 0x180(%r9)
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vmovups %zmm15, 0x1C0(%r9)
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ret
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L(1024bytesormore_bkw):
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add $512, %rdi
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vmovups 0x1C0(%rsi), %zmm8
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vmovups 0x180(%rsi), %zmm9
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vmovups 0x140(%rsi), %zmm10
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vmovups 0x100(%rsi), %zmm11
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vmovups 0xC0(%rsi), %zmm12
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vmovups 0x80(%rsi), %zmm13
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vmovups 0x40(%rsi), %zmm14
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vmovups (%rsi), %zmm15
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prefetcht1 -0x40(%rcx)
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prefetcht1 -0x80(%rcx)
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prefetcht1 -0xC0(%rcx)
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prefetcht1 -0x100(%rcx)
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prefetcht1 -0x140(%rcx)
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prefetcht1 -0x180(%rcx)
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prefetcht1 -0x1C0(%rcx)
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prefetcht1 -0x200(%rcx)
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/* Backward loop with unaligned memory access. */
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L(gobble_512bytes_loop_bkw):
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vmovups -0x40(%rcx), %zmm0
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vmovups -0x80(%rcx), %zmm1
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vmovups -0xC0(%rcx), %zmm2
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vmovups -0x100(%rcx), %zmm3
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vmovups -0x140(%rcx), %zmm4
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vmovups -0x180(%rcx), %zmm5
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vmovups -0x1C0(%rcx), %zmm6
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vmovups -0x200(%rcx), %zmm7
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sub $512, %rcx
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prefetcht1 -0x40(%rcx)
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prefetcht1 -0x80(%rcx)
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prefetcht1 -0xC0(%rcx)
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prefetcht1 -0x100(%rcx)
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prefetcht1 -0x140(%rcx)
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prefetcht1 -0x180(%rcx)
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prefetcht1 -0x1C0(%rcx)
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prefetcht1 -0x200(%rcx)
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vmovups %zmm0, -0x40(%r9)
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vmovups %zmm1, -0x80(%r9)
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vmovups %zmm2, -0xC0(%r9)
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vmovups %zmm3, -0x100(%r9)
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vmovups %zmm4, -0x140(%r9)
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vmovups %zmm5, -0x180(%r9)
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vmovups %zmm6, -0x1C0(%r9)
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vmovups %zmm7, -0x200(%r9)
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sub $512, %r9
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cmp %rdi, %r9
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ja L(gobble_512bytes_loop_bkw)
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vmovups %zmm8, -0x40(%rdi)
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vmovups %zmm9, -0x80(%rdi)
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vmovups %zmm10, -0xC0(%rdi)
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vmovups %zmm11, -0x100(%rdi)
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vmovups %zmm12, -0x140(%rdi)
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vmovups %zmm13, -0x180(%rdi)
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vmovups %zmm14, -0x1C0(%rdi)
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vmovups %zmm15, -0x200(%rdi)
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ret
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L(preloop_large):
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cmp %rsi, %rdi
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ja L(preloop_large_bkw)
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vmovups (%rsi), %zmm4
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vmovups 0x40(%rsi), %zmm5
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mov %rdi, %r11
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/* Align destination for access with non-temporal stores in the loop. */
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mov %rdi, %r8
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and $-0x80, %rdi
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add $0x80, %rdi
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sub %rdi, %r8
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sub %r8, %rsi
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add %r8, %rdx
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L(gobble_256bytes_nt_loop):
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prefetcht1 0x200(%rsi)
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prefetcht1 0x240(%rsi)
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prefetcht1 0x280(%rsi)
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prefetcht1 0x2C0(%rsi)
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prefetcht1 0x300(%rsi)
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prefetcht1 0x340(%rsi)
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prefetcht1 0x380(%rsi)
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prefetcht1 0x3C0(%rsi)
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vmovdqu64 (%rsi), %zmm0
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vmovdqu64 0x40(%rsi), %zmm1
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vmovdqu64 0x80(%rsi), %zmm2
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vmovdqu64 0xC0(%rsi), %zmm3
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vmovntdq %zmm0, (%rdi)
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vmovntdq %zmm1, 0x40(%rdi)
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vmovntdq %zmm2, 0x80(%rdi)
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vmovntdq %zmm3, 0xC0(%rdi)
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sub $256, %rdx
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add $256, %rsi
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add $256, %rdi
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cmp $256, %rdx
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ja L(gobble_256bytes_nt_loop)
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sfence
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vmovups %zmm4, (%r11)
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vmovups %zmm5, 0x40(%r11)
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jmp L(check)
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L(preloop_large_bkw):
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vmovups -0x80(%rcx), %zmm4
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vmovups -0x40(%rcx), %zmm5
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/* Align end of destination for access with non-temporal stores. */
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mov %r9, %r8
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and $-0x80, %r9
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sub %r9, %r8
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sub %r8, %rcx
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sub %r8, %rdx
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add %r9, %r8
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L(gobble_256bytes_nt_loop_bkw):
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prefetcht1 -0x400(%rcx)
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prefetcht1 -0x3C0(%rcx)
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prefetcht1 -0x380(%rcx)
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prefetcht1 -0x340(%rcx)
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prefetcht1 -0x300(%rcx)
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prefetcht1 -0x2C0(%rcx)
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prefetcht1 -0x280(%rcx)
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prefetcht1 -0x240(%rcx)
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vmovdqu64 -0x100(%rcx), %zmm0
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vmovdqu64 -0xC0(%rcx), %zmm1
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vmovdqu64 -0x80(%rcx), %zmm2
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vmovdqu64 -0x40(%rcx), %zmm3
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vmovntdq %zmm0, -0x100(%r9)
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vmovntdq %zmm1, -0xC0(%r9)
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vmovntdq %zmm2, -0x80(%r9)
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vmovntdq %zmm3, -0x40(%r9)
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sub $256, %rdx
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sub $256, %rcx
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sub $256, %r9
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cmp $256, %rdx
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ja L(gobble_256bytes_nt_loop_bkw)
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|
sfence
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|
vmovups %zmm4, -0x80(%r8)
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|
vmovups %zmm5, -0x40(%r8)
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|
jmp L(check)
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|
END (__memmove_avx512_no_vzeroupper)
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|
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strong_alias (__memmove_avx512_no_vzeroupper, __memcpy_avx512_no_vzeroupper)
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strong_alias (__memmove_chk_avx512_no_vzeroupper, __memcpy_chk_avx512_no_vzeroupper)
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#endif
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