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ceabdcd130
1. Add default ISA level selection in non-multiarch/rtld
implementations.
2. Add ISA level build guards to different implementations.
- I.e strcmp-avx2.S which is ISA level 3 will only build if
compiled ISA level <= 3. Otherwise there is no reason to
include it as we will always use one of the ISA level 4
implementations (strcmp-evex.S).
3. Refactor the ifunc selector and ifunc implementation list to use
the ISA level aware wrapper macros that allow functions below the
compiled ISA level (with a guranteed replacement) to be skipped.
Tested with and without multiarch on x86_64 for ISA levels:
{generic, x86-64-v2, x86-64-v3, x86-64-v4}
And m32 with and without multiarch.
316 lines
7.3 KiB
ArmAsm
316 lines
7.3 KiB
ArmAsm
/* strchr/strchrnul optimized with AVX2.
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Copyright (C) 2017-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <isa-level.h>
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#if ISA_SHOULD_BUILD (3)
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# include <sysdep.h>
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# ifndef STRCHR
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# define STRCHR __strchr_avx2
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# endif
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# ifdef USE_AS_WCSCHR
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# define VPBROADCAST vpbroadcastd
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# define VPCMPEQ vpcmpeqd
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# define VPMINU vpminud
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# define CHAR_REG esi
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# else
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# define VPBROADCAST vpbroadcastb
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# define VPCMPEQ vpcmpeqb
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# define VPMINU vpminub
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# define CHAR_REG sil
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# endif
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# ifndef VZEROUPPER
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# define VZEROUPPER vzeroupper
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# endif
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# ifndef SECTION
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# define SECTION(p) p##.avx
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# endif
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# define VEC_SIZE 32
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# define PAGE_SIZE 4096
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.section SECTION(.text),"ax",@progbits
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ENTRY_P2ALIGN (STRCHR, 5)
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/* Broadcast CHAR to YMM0. */
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vmovd %esi, %xmm0
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movl %edi, %eax
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andl $(PAGE_SIZE - 1), %eax
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VPBROADCAST %xmm0, %ymm0
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vpxor %xmm1, %xmm1, %xmm1
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/* Check if we cross page boundary with one vector load. */
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cmpl $(PAGE_SIZE - VEC_SIZE), %eax
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ja L(cross_page_boundary)
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/* Check the first VEC_SIZE bytes. Search for both CHAR and the
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null byte. */
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vmovdqu (%rdi), %ymm2
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VPCMPEQ %ymm2, %ymm0, %ymm3
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VPCMPEQ %ymm2, %ymm1, %ymm2
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vpor %ymm3, %ymm2, %ymm3
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jz L(aligned_more)
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tzcntl %eax, %eax
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# ifndef USE_AS_STRCHRNUL
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/* Found CHAR or the null byte. */
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cmp (%rdi, %rax), %CHAR_REG
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/* NB: Use a branch instead of cmovcc here. The expectation is
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that with strchr the user will branch based on input being
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null. Since this branch will be 100% predictive of the user
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branch a branch miss here should save what otherwise would
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be branch miss in the user code. Otherwise using a branch 1)
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saves code size and 2) is faster in highly predictable
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environments. */
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jne L(zero)
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# endif
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addq %rdi, %rax
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L(return_vzeroupper):
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ZERO_UPPER_VEC_REGISTERS_RETURN
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# ifndef USE_AS_STRCHRNUL
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L(zero):
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xorl %eax, %eax
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VZEROUPPER_RETURN
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# endif
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.p2align 4
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L(first_vec_x1):
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/* Use bsf to save code size. */
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bsfl %eax, %eax
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incq %rdi
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# ifndef USE_AS_STRCHRNUL
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/* Found CHAR or the null byte. */
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cmp (%rdi, %rax), %CHAR_REG
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jne L(zero)
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# endif
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4,, 10
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L(first_vec_x2):
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/* Use bsf to save code size. */
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bsfl %eax, %eax
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addq $(VEC_SIZE + 1), %rdi
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# ifndef USE_AS_STRCHRNUL
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/* Found CHAR or the null byte. */
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cmp (%rdi, %rax), %CHAR_REG
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jne L(zero)
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# endif
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4,, 8
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L(first_vec_x3):
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/* Use bsf to save code size. */
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bsfl %eax, %eax
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addq $(VEC_SIZE * 2 + 1), %rdi
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# ifndef USE_AS_STRCHRNUL
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/* Found CHAR or the null byte. */
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cmp (%rdi, %rax), %CHAR_REG
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jne L(zero)
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# endif
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4,, 10
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L(first_vec_x4):
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/* Use bsf to save code size. */
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bsfl %eax, %eax
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addq $(VEC_SIZE * 3 + 1), %rdi
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# ifndef USE_AS_STRCHRNUL
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/* Found CHAR or the null byte. */
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cmp (%rdi, %rax), %CHAR_REG
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jne L(zero)
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# endif
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(aligned_more):
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/* Align data to VEC_SIZE - 1. This is the same number of
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instructions as using andq -VEC_SIZE but saves 4 bytes of code
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on x4 check. */
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orq $(VEC_SIZE - 1), %rdi
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L(cross_page_continue):
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/* Check the next 4 * VEC_SIZE. Only one VEC_SIZE at a time
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since data is only aligned to VEC_SIZE. */
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vmovdqa 1(%rdi), %ymm2
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VPCMPEQ %ymm2, %ymm0, %ymm3
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VPCMPEQ %ymm2, %ymm1, %ymm2
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vpor %ymm3, %ymm2, %ymm3
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jnz L(first_vec_x1)
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vmovdqa (VEC_SIZE + 1)(%rdi), %ymm2
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VPCMPEQ %ymm2, %ymm0, %ymm3
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VPCMPEQ %ymm2, %ymm1, %ymm2
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vpor %ymm3, %ymm2, %ymm3
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jnz L(first_vec_x2)
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vmovdqa (VEC_SIZE * 2 + 1)(%rdi), %ymm2
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VPCMPEQ %ymm2, %ymm0, %ymm3
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VPCMPEQ %ymm2, %ymm1, %ymm2
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vpor %ymm3, %ymm2, %ymm3
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jnz L(first_vec_x3)
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vmovdqa (VEC_SIZE * 3 + 1)(%rdi), %ymm2
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VPCMPEQ %ymm2, %ymm0, %ymm3
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VPCMPEQ %ymm2, %ymm1, %ymm2
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vpor %ymm3, %ymm2, %ymm3
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jnz L(first_vec_x4)
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/* Align data to VEC_SIZE * 4 - 1. */
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incq %rdi
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orq $(VEC_SIZE * 4 - 1), %rdi
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.p2align 4
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L(loop_4x_vec):
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/* Compare 4 * VEC at a time forward. */
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vmovdqa 1(%rdi), %ymm6
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vmovdqa (VEC_SIZE + 1)(%rdi), %ymm7
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/* Leaves only CHARS matching esi as 0. */
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vpxor %ymm6, %ymm0, %ymm2
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vpxor %ymm7, %ymm0, %ymm3
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VPMINU %ymm2, %ymm6, %ymm2
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VPMINU %ymm3, %ymm7, %ymm3
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vmovdqa (VEC_SIZE * 2 + 1)(%rdi), %ymm6
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vmovdqa (VEC_SIZE * 3 + 1)(%rdi), %ymm7
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vpxor %ymm6, %ymm0, %ymm4
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vpxor %ymm7, %ymm0, %ymm5
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VPMINU %ymm4, %ymm6, %ymm4
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VPMINU %ymm5, %ymm7, %ymm5
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VPMINU %ymm2, %ymm3, %ymm6
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VPMINU %ymm4, %ymm5, %ymm7
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VPMINU %ymm6, %ymm7, %ymm7
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VPCMPEQ %ymm7, %ymm1, %ymm7
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vpmovmskb %ymm7, %ecx
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subq $-(VEC_SIZE * 4), %rdi
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testl %ecx, %ecx
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jz L(loop_4x_vec)
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VPCMPEQ %ymm2, %ymm1, %ymm2
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vpmovmskb %ymm2, %eax
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testl %eax, %eax
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jnz L(last_vec_x0)
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VPCMPEQ %ymm3, %ymm1, %ymm3
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jnz L(last_vec_x1)
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VPCMPEQ %ymm4, %ymm1, %ymm4
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vpmovmskb %ymm4, %eax
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/* rcx has combined result from all 4 VEC. It will only be used
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if the first 3 other VEC all did not contain a match. */
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salq $32, %rcx
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orq %rcx, %rax
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tzcntq %rax, %rax
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subq $(VEC_SIZE * 2 - 1), %rdi
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# ifndef USE_AS_STRCHRNUL
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/* Found CHAR or the null byte. */
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cmp (%rdi, %rax), %CHAR_REG
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jne L(zero_end)
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# endif
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4,, 10
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L(last_vec_x0):
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/* Use bsf to save code size. */
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bsfl %eax, %eax
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addq $-(VEC_SIZE * 4 - 1), %rdi
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# ifndef USE_AS_STRCHRNUL
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/* Found CHAR or the null byte. */
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cmp (%rdi, %rax), %CHAR_REG
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jne L(zero_end)
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# endif
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4,, 10
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L(last_vec_x1):
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tzcntl %eax, %eax
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subq $(VEC_SIZE * 3 - 1), %rdi
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# ifndef USE_AS_STRCHRNUL
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/* Found CHAR or the null byte. */
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cmp (%rdi, %rax), %CHAR_REG
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jne L(zero_end)
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# endif
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addq %rdi, %rax
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VZEROUPPER_RETURN
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# ifndef USE_AS_STRCHRNUL
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L(zero_end):
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xorl %eax, %eax
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VZEROUPPER_RETURN
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# endif
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/* Cold case for crossing page with first load. */
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.p2align 4,, 8
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L(cross_page_boundary):
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movq %rdi, %rdx
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/* Align rdi to VEC_SIZE - 1. */
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orq $(VEC_SIZE - 1), %rdi
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vmovdqa -(VEC_SIZE - 1)(%rdi), %ymm2
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VPCMPEQ %ymm2, %ymm0, %ymm3
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VPCMPEQ %ymm2, %ymm1, %ymm2
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vpor %ymm3, %ymm2, %ymm3
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vpmovmskb %ymm3, %eax
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/* Remove the leading bytes. sarxl only uses bits [5:0] of COUNT
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so no need to manually mod edx. */
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sarxl %edx, %eax, %eax
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testl %eax, %eax
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jz L(cross_page_continue)
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tzcntl %eax, %eax
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# ifndef USE_AS_STRCHRNUL
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xorl %ecx, %ecx
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/* Found CHAR or the null byte. */
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cmp (%rdx, %rax), %CHAR_REG
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jne L(zero_end)
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# endif
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addq %rdx, %rax
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VZEROUPPER_RETURN
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END (STRCHR)
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#endif
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