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I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 7061 files FOO. I then removed trailing white space from math/tgmath.h, support/tst-support-open-dev-null-range.c, and sysdeps/x86_64/multiarch/strlen-vec.S, to work around the following obscure pre-commit check failure diagnostics from Savannah. I don't know why I run into these diagnostics whereas others evidently do not. remote: *** 912-#endif remote: *** 913: remote: *** 914- remote: *** error: lines with trailing whitespace found ... remote: *** error: sysdeps/unix/sysv/linux/statx_cp.c: trailing lines
478 lines
14 KiB
ArmAsm
478 lines
14 KiB
ArmAsm
# Alpha ev6 mpn_addmul_1 -- Multiply a limb vector with a limb and add
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# the result to a second limb vector.
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#
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# Copyright (C) 2000-2022 Free Software Foundation, Inc.
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#
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# This file is part of the GNU MP Library.
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#
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# The GNU MP Library is free software; you can redistribute it and/or modify
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# it under the terms of the GNU Lesser General Public License as published
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# by the Free Software Foundation; either version 2.1 of the License, or (at
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# your option) any later version.
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#
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# The GNU MP Library is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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# License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public License
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# along with the GNU MP Library. If not, see <https://www.gnu.org/licenses/>.
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# INPUT PARAMETERS
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# res_ptr $16
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# s1_ptr $17
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# size $18
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# s2_limb $19
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#
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# This code runs at 42 cycles/limb on EV4, 18 cycles/limb on EV5, and
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# exactly 3.625 cycles/limb on EV6...
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#
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# This code was written in close cooperation with ev6 pipeline expert
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# Steve Root (root@toober.hlo.dec.com). Any errors are tege's fault, though.
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#
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# Register usages for unrolled loop:
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# 0-3 mul's
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# 4-7 acc's
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# 8-15 mul results
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# 20,21 carry's
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# 22,23 save for stores
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#
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# Sustains 8 mul-adds in 29 cycles in the unrolled inner loop.
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#
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# The stores can issue a cycle late so we have paired no-op's to 'catch'
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# them, so that further disturbance to the schedule is damped.
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#
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# We couldn't pair the loads, because the entangled schedule of the
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# carry's has to happen on one side {0} of the machine. Note, the total
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# use of U0, and the total use of L0 (after attending to the stores).
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# which is part of the reason why....
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#
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# This is a great schedule for the d_cache, a poor schedule for the
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# b_cache. The lockup on U0 means that any stall can't be recovered
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# from. Consider a ldq in L1. say that load gets stalled because it
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# collides with a fill from the b_Cache. On the next cycle, this load
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# gets priority. If first looks at L0, and goes there. The instruction
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# we intended for L0 gets to look at L1, which is NOT where we want
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# it. It either stalls 1, because it can't go in L0, or goes there, and
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# causes a further instruction to stall.
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#
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# So for b_cache, we're likely going to want to put one or more cycles
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# back into the code! And, of course, put in prefetches. For the
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# accumulator, lds, intent to modify. For the multiplier, you might
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# want ldq, evict next, if you're not wanting to use it again soon. Use
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# 256 ahead of present pointer value. At a place where we have an mt
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# followed by a bookkeeping, put the bookkeeping in upper, and the
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# prefetch into lower.
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#
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# Note, the usage of physical registers per cycle is smoothed off, as
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# much as possible.
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#
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# Note, the ldq's and stq's are at the end of the quadpacks. note, we'd
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# like not to have a ldq or stq to preceded a conditional branch in a
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# quadpack. The conditional branch moves the retire pointer one cycle
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# later.
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#
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# Optimization notes:
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# Callee-saves regs: $9 $10 $11 $12 $13 $14 $15 $26 ?$27?
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# Reserved regs: $29 $30 $31
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# Free caller-saves regs in unrolled code: $24 $25 $28
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# We should swap some of the callee-saves regs for some of the free
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# caller-saves regs, saving some overhead cycles.
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# Most importantly, we should write fast code for the 0-7 case.
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# The code we use there are for the 21164, and runs at 7 cycles/limb
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# on the 21264. Should not be hard, if we write specialized code for
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# 1-7 limbs (the one for 0 limbs should be straightforward). We then just
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# need a jump table indexed by the low 3 bits of the count argument.
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.set noreorder
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.set noat
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.text
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.globl __mpn_addmul_1
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.ent __mpn_addmul_1
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__mpn_addmul_1:
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.frame $30,0,$26,0
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.prologue 0
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cmpult $18, 8, $1
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beq $1, $Large
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ldq $2, 0($17) # $2 = s1_limb
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addq $17, 8, $17 # s1_ptr++
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subq $18, 1, $18 # size--
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mulq $2, $19, $3 # $3 = prod_low
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ldq $5, 0($16) # $5 = *res_ptr
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umulh $2, $19, $0 # $0 = prod_high
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beq $18, $Lend0b # jump if size was == 1
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ldq $2, 0($17) # $2 = s1_limb
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addq $17, 8, $17 # s1_ptr++
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subq $18, 1, $18 # size--
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addq $5, $3, $3
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cmpult $3, $5, $4
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stq $3, 0($16)
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addq $16, 8, $16 # res_ptr++
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beq $18, $Lend0a # jump if size was == 2
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.align 3
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$Loop0: mulq $2, $19, $3 # $3 = prod_low
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ldq $5, 0($16) # $5 = *res_ptr
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addq $4, $0, $0 # cy_limb = cy_limb + 'cy'
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subq $18, 1, $18 # size--
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umulh $2, $19, $4 # $4 = cy_limb
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ldq $2, 0($17) # $2 = s1_limb
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addq $17, 8, $17 # s1_ptr++
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addq $3, $0, $3 # $3 = cy_limb + prod_low
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cmpult $3, $0, $0 # $0 = carry from (cy_limb + prod_low)
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addq $5, $3, $3
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cmpult $3, $5, $5
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stq $3, 0($16)
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addq $16, 8, $16 # res_ptr++
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addq $5, $0, $0 # combine carries
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bne $18, $Loop0
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$Lend0a:
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mulq $2, $19, $3 # $3 = prod_low
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ldq $5, 0($16) # $5 = *res_ptr
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addq $4, $0, $0 # cy_limb = cy_limb + 'cy'
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umulh $2, $19, $4 # $4 = cy_limb
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addq $3, $0, $3 # $3 = cy_limb + prod_low
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cmpult $3, $0, $0 # $0 = carry from (cy_limb + prod_low)
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addq $5, $3, $3
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cmpult $3, $5, $5
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stq $3, 0($16)
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addq $5, $0, $0 # combine carries
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addq $4, $0, $0 # cy_limb = prod_high + cy
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ret $31, ($26), 1
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$Lend0b:
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addq $5, $3, $3
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cmpult $3, $5, $5
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stq $3, 0($16)
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addq $0, $5, $0
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ret $31, ($26), 1
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$Large:
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lda $30, -240($30)
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stq $9, 8($30)
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stq $10, 16($30)
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stq $11, 24($30)
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stq $12, 32($30)
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stq $13, 40($30)
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stq $14, 48($30)
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stq $15, 56($30)
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and $18, 7, $20 # count for the first loop, 0-7
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srl $18, 3, $18 # count for unrolled loop
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bis $31, $31, $0
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beq $20, $Lunroll
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ldq $2, 0($17) # $2 = s1_limb
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addq $17, 8, $17 # s1_ptr++
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subq $20, 1, $20 # size--
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mulq $2, $19, $3 # $3 = prod_low
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ldq $5, 0($16) # $5 = *res_ptr
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umulh $2, $19, $0 # $0 = prod_high
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beq $20, $Lend1b # jump if size was == 1
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ldq $2, 0($17) # $2 = s1_limb
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addq $17, 8, $17 # s1_ptr++
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subq $20, 1, $20 # size--
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addq $5, $3, $3
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cmpult $3, $5, $4
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stq $3, 0($16)
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addq $16, 8, $16 # res_ptr++
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beq $20, $Lend1a # jump if size was == 2
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.align 3
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$Loop1: mulq $2, $19, $3 # $3 = prod_low
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ldq $5, 0($16) # $5 = *res_ptr
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addq $4, $0, $0 # cy_limb = cy_limb + 'cy'
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subq $20, 1, $20 # size--
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umulh $2, $19, $4 # $4 = cy_limb
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ldq $2, 0($17) # $2 = s1_limb
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addq $17, 8, $17 # s1_ptr++
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addq $3, $0, $3 # $3 = cy_limb + prod_low
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cmpult $3, $0, $0 # $0 = carry from (cy_limb + prod_low)
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addq $5, $3, $3
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cmpult $3, $5, $5
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stq $3, 0($16)
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addq $16, 8, $16 # res_ptr++
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addq $5, $0, $0 # combine carries
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bne $20, $Loop1
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$Lend1a:
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mulq $2, $19, $3 # $3 = prod_low
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ldq $5, 0($16) # $5 = *res_ptr
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addq $4, $0, $0 # cy_limb = cy_limb + 'cy'
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umulh $2, $19, $4 # $4 = cy_limb
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addq $3, $0, $3 # $3 = cy_limb + prod_low
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cmpult $3, $0, $0 # $0 = carry from (cy_limb + prod_low)
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addq $5, $3, $3
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cmpult $3, $5, $5
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stq $3, 0($16)
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addq $16, 8, $16 # res_ptr++
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addq $5, $0, $0 # combine carries
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addq $4, $0, $0 # cy_limb = prod_high + cy
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br $31, $Lunroll
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$Lend1b:
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addq $5, $3, $3
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cmpult $3, $5, $5
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stq $3, 0($16)
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addq $16, 8, $16 # res_ptr++
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addq $0, $5, $0
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$Lunroll:
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lda $17, -16($17) # L1 bookkeeping
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lda $16, -16($16) # L1 bookkeeping
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bis $0, $31, $12
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# ____ UNROLLED LOOP SOFTWARE PIPELINE STARTUP ____
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ldq $2, 16($17) # L1
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ldq $3, 24($17) # L1
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lda $18, -1($18) # L1 bookkeeping
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ldq $6, 16($16) # L1
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ldq $7, 24($16) # L1
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ldq $0, 32($17) # L1
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mulq $19, $2, $13 # U1
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ldq $1, 40($17) # L1
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umulh $19, $2, $14 # U1
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mulq $19, $3, $15 # U1
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lda $17, 64($17) # L1 bookkeeping
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ldq $4, 32($16) # L1
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ldq $5, 40($16) # L1
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umulh $19, $3, $8 # U1
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ldq $2, -16($17) # L1
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mulq $19, $0, $9 # U1
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ldq $3, -8($17) # L1
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umulh $19, $0, $10 # U1
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addq $6, $13, $6 # L0 lo + acc
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mulq $19, $1, $11 # U1
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cmpult $6, $13, $20 # L0 lo add => carry
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lda $16, 64($16) # L1 bookkeeping
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addq $6, $12, $22 # U0 hi add => answer
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cmpult $22, $12, $21 # L0 hi add => carry
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addq $14, $20, $14 # U0 hi mul + carry
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ldq $6, -16($16) # L1
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addq $7, $15, $23 # L0 lo + acc
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addq $14, $21, $14 # U0 hi mul + carry
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ldq $7, -8($16) # L1
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umulh $19, $1, $12 # U1
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cmpult $23, $15, $20 # L0 lo add => carry
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addq $23, $14, $23 # U0 hi add => answer
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ldq $0, 0($17) # L1
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mulq $19, $2, $13 # U1
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cmpult $23, $14, $21 # L0 hi add => carry
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addq $8, $20, $8 # U0 hi mul + carry
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ldq $1, 8($17) # L1
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umulh $19, $2, $14 # U1
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addq $4, $9, $4 # L0 lo + acc
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stq $22, -48($16) # L0
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stq $23, -40($16) # L1
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mulq $19, $3, $15 # U1
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addq $8, $21, $8 # U0 hi mul + carry
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cmpult $4, $9, $20 # L0 lo add => carry
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addq $4, $8, $22 # U0 hi add => answer
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ble $18, $Lend # U1 bookkeeping
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# ____ MAIN UNROLLED LOOP ____
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.align 4
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$Loop:
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bis $31, $31, $31 # U1 mt
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cmpult $22, $8, $21 # L0 hi add => carry
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addq $10, $20, $10 # U0 hi mul + carry
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ldq $4, 0($16) # L1
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bis $31, $31, $31 # U1 mt
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addq $5, $11, $23 # L0 lo + acc
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addq $10, $21, $10 # L0 hi mul + carry
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ldq $5, 8($16) # L1
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umulh $19, $3, $8 # U1
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cmpult $23, $11, $20 # L0 lo add => carry
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addq $23, $10, $23 # U0 hi add => answer
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ldq $2, 16($17) # L1
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mulq $19, $0, $9 # U1
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cmpult $23, $10, $21 # L0 hi add => carry
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addq $12, $20, $12 # U0 hi mul + carry
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ldq $3, 24($17) # L1
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umulh $19, $0, $10 # U1
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addq $6, $13, $6 # L0 lo + acc
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stq $22, -32($16) # L0
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stq $23, -24($16) # L1
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bis $31, $31, $31 # L0 st slosh
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mulq $19, $1, $11 # U1
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bis $31, $31, $31 # L1 st slosh
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addq $12, $21, $12 # U0 hi mul + carry
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cmpult $6, $13, $20 # L0 lo add => carry
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bis $31, $31, $31 # U1 mt
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lda $18, -1($18) # L1 bookkeeping
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addq $6, $12, $22 # U0 hi add => answer
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bis $31, $31, $31 # U1 mt
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cmpult $22, $12, $21 # L0 hi add => carry
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addq $14, $20, $14 # U0 hi mul + carry
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ldq $6, 16($16) # L1
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bis $31, $31, $31 # U1 mt
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addq $7, $15, $23 # L0 lo + acc
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addq $14, $21, $14 # U0 hi mul + carry
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ldq $7, 24($16) # L1
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umulh $19, $1, $12 # U1
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cmpult $23, $15, $20 # L0 lo add => carry
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addq $23, $14, $23 # U0 hi add => answer
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ldq $0, 32($17) # L1
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mulq $19, $2, $13 # U1
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cmpult $23, $14, $21 # L0 hi add => carry
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addq $8, $20, $8 # U0 hi mul + carry
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ldq $1, 40($17) # L1
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umulh $19, $2, $14 # U1
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addq $4, $9, $4 # U0 lo + acc
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stq $22, -16($16) # L0
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stq $23, -8($16) # L1
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bis $31, $31, $31 # L0 st slosh
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mulq $19, $3, $15 # U1
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bis $31, $31, $31 # L1 st slosh
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addq $8, $21, $8 # L0 hi mul + carry
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cmpult $4, $9, $20 # L0 lo add => carry
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bis $31, $31, $31 # U1 mt
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lda $17, 64($17) # L1 bookkeeping
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addq $4, $8, $22 # U0 hi add => answer
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bis $31, $31, $31 # U1 mt
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cmpult $22, $8, $21 # L0 hi add => carry
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addq $10, $20, $10 # U0 hi mul + carry
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ldq $4, 32($16) # L1
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bis $31, $31, $31 # U1 mt
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addq $5, $11, $23 # L0 lo + acc
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addq $10, $21, $10 # L0 hi mul + carry
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ldq $5, 40($16) # L1
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umulh $19, $3, $8 # U1
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cmpult $23, $11, $20 # L0 lo add => carry
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addq $23, $10, $23 # U0 hi add => answer
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ldq $2, -16($17) # L1
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mulq $19, $0, $9 # U1
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cmpult $23, $10, $21 # L0 hi add => carry
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addq $12, $20, $12 # U0 hi mul + carry
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ldq $3, -8($17) # L1
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umulh $19, $0, $10 # U1
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addq $6, $13, $6 # L0 lo + acc
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stq $22, 0($16) # L0
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stq $23, 8($16) # L1
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bis $31, $31, $31 # L0 st slosh
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mulq $19, $1, $11 # U1
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bis $31, $31, $31 # L1 st slosh
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addq $12, $21, $12 # U0 hi mul + carry
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cmpult $6, $13, $20 # L0 lo add => carry
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bis $31, $31, $31 # U1 mt
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lda $16, 64($16) # L1 bookkeeping
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addq $6, $12, $22 # U0 hi add => answer
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bis $31, $31, $31 # U1 mt
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cmpult $22, $12, $21 # L0 hi add => carry
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addq $14, $20, $14 # U0 hi mul + carry
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ldq $6, -16($16) # L1
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bis $31, $31, $31 # U1 mt
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addq $7, $15, $23 # L0 lo + acc
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addq $14, $21, $14 # U0 hi mul + carry
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ldq $7, -8($16) # L1
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umulh $19, $1, $12 # U1
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cmpult $23, $15, $20 # L0 lo add => carry
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addq $23, $14, $23 # U0 hi add => answer
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ldq $0, 0($17) # L1
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mulq $19, $2, $13 # U1
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cmpult $23, $14, $21 # L0 hi add => carry
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addq $8, $20, $8 # U0 hi mul + carry
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ldq $1, 8($17) # L1
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umulh $19, $2, $14 # U1
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addq $4, $9, $4 # L0 lo + acc
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stq $22, -48($16) # L0
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stq $23, -40($16) # L1
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bis $31, $31, $31 # L0 st slosh
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mulq $19, $3, $15 # U1
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bis $31, $31, $31 # L1 st slosh
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addq $8, $21, $8 # U0 hi mul + carry
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|
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cmpult $4, $9, $20 # L0 lo add => carry
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addq $4, $8, $22 # U0 hi add => answer
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bis $31, $31, $31 # L1 mt
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bgt $18, $Loop # U1 bookkeeping
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# ____ UNROLLED LOOP SOFTWARE PIPELINE FINISH ____
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$Lend:
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cmpult $22, $8, $21 # L0 hi add => carry
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addq $10, $20, $10 # U0 hi mul + carry
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ldq $4, 0($16) # L1
|
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addq $5, $11, $23 # L0 lo + acc
|
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addq $10, $21, $10 # L0 hi mul + carry
|
|
ldq $5, 8($16) # L1
|
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umulh $19, $3, $8 # U1
|
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cmpult $23, $11, $20 # L0 lo add => carry
|
|
addq $23, $10, $23 # U0 hi add => answer
|
|
mulq $19, $0, $9 # U1
|
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cmpult $23, $10, $21 # L0 hi add => carry
|
|
addq $12, $20, $12 # U0 hi mul + carry
|
|
umulh $19, $0, $10 # U1
|
|
addq $6, $13, $6 # L0 lo + acc
|
|
stq $22, -32($16) # L0
|
|
stq $23, -24($16) # L1
|
|
mulq $19, $1, $11 # U1
|
|
addq $12, $21, $12 # U0 hi mul + carry
|
|
cmpult $6, $13, $20 # L0 lo add => carry
|
|
addq $6, $12, $22 # U0 hi add => answer
|
|
cmpult $22, $12, $21 # L0 hi add => carry
|
|
addq $14, $20, $14 # U0 hi mul + carry
|
|
addq $7, $15, $23 # L0 lo + acc
|
|
addq $14, $21, $14 # U0 hi mul + carry
|
|
umulh $19, $1, $12 # U1
|
|
cmpult $23, $15, $20 # L0 lo add => carry
|
|
addq $23, $14, $23 # U0 hi add => answer
|
|
cmpult $23, $14, $21 # L0 hi add => carry
|
|
addq $8, $20, $8 # U0 hi mul + carry
|
|
addq $4, $9, $4 # U0 lo + acc
|
|
stq $22, -16($16) # L0
|
|
stq $23, -8($16) # L1
|
|
bis $31, $31, $31 # L0 st slosh
|
|
addq $8, $21, $8 # L0 hi mul + carry
|
|
cmpult $4, $9, $20 # L0 lo add => carry
|
|
addq $4, $8, $22 # U0 hi add => answer
|
|
cmpult $22, $8, $21 # L0 hi add => carry
|
|
addq $10, $20, $10 # U0 hi mul + carry
|
|
addq $5, $11, $23 # L0 lo + acc
|
|
addq $10, $21, $10 # L0 hi mul + carry
|
|
cmpult $23, $11, $20 # L0 lo add => carry
|
|
addq $23, $10, $23 # U0 hi add => answer
|
|
cmpult $23, $10, $21 # L0 hi add => carry
|
|
addq $12, $20, $12 # U0 hi mul + carry
|
|
stq $22, 0($16) # L0
|
|
stq $23, 8($16) # L1
|
|
addq $12, $21, $0 # U0 hi mul + carry
|
|
|
|
ldq $9, 8($30)
|
|
ldq $10, 16($30)
|
|
ldq $11, 24($30)
|
|
ldq $12, 32($30)
|
|
ldq $13, 40($30)
|
|
ldq $14, 48($30)
|
|
ldq $15, 56($30)
|
|
lda $30, 240($30)
|
|
ret $31, ($26), 1
|
|
|
|
.end __mpn_addmul_1
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