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2002-06-05 Brian Youmans <3diff@gnu.org> * sysdeps/ia64/fpu/e_acos.S: Added text of Intel license. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_atan2_req.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_frexp4.S: Likewise. * sysdeps/ia64/fpu/libm_frexp4f.S: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ieee754/dbl-64/doasin.c: Changed copyright notice to reflect IBM donation of math library to FSF * sysdeps/ieee754/dbl-64/dosincos.c: Likewise. * sysdeps/ieee754/dbl-64/e_asin.c: Likewise. * sysdeps/ieee754/dbl-64/e_atan2.c: Likewise. * sysdeps/ieee754/dbl-64/e_exp.c: Likewise. * sysdeps/ieee754/dbl-64/e_log.c: Likewise. * sysdeps/ieee754/dbl-64/e_pow.c: Likewise. * sysdeps/ieee754/dbl-64/e_remainder.c: Likewise. * sysdeps/ieee754/dbl-64/e_sqrt.c: Likewise. * sysdeps/ieee754/dbl-64/halfulp.c: Likewise. * sysdeps/ieee754/dbl-64/mpa.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan2.c: Likewise. * sysdeps/ieee754/dbl-64/mpexp.c: Likewise. * sysdeps/ieee754/dbl-64/mplog.c: Likewise. * sysdeps/ieee754/dbl-64/mpsqrt.c: Likewise. * sysdeps/ieee754/dbl-64/mptan.c: Likewise. * sysdeps/ieee754/dbl-64/s_atan.c: Likewise. * sysdeps/ieee754/dbl-64/s_sin.c: Likewise. * sysdeps/ieee754/dbl-64/s_tan.c: Likewise. * sysdeps/ieee754/dbl-64/sincos32.c: Likewise. * sysdeps/ieee754/dbl-64/slowexp.c: Likewise. * sysdeps/ieee754/dbl-64/slowpow.c: Likewise. * sysdeps/gnu/netinet/udp.h: Added BSD copying permission notice * sysdeps/vax/__longjmp.c: Likewise. * sysdeps/vax/setjmp.c: Likewise. * libio/filedoalloc.c: Fixed BSD copying permission notice to remove advertising clause * sysdeps/vax/htonl.s: Likewise. * sysdeps/vax/htons.s: Likewise. * libio/wfiledoalloc.c: Likewise. * stdlib/random.c: Likewise. * stdlib/random_r.c: Likewise. * sysdeps/mach/sys/reboot.h: Likewise. * inet/getnameinfo.c: Deleted advertising clause from Inner Net License * sysdeps/posix/getaddrinfo.c: Likewise. * sunrpc/des_impl.c: Updated license permission notice to Lesser GPL and corrected pointer to point to the correct license.
250 lines
6.4 KiB
ArmAsm
250 lines
6.4 KiB
ArmAsm
.file "round.s"
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// Copyright (C) 2000, 2001, Intel Corporation
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// All rights reserved.
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//
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// Contributed 10/25/2000 by John Harrison, Cristina Iordache, Ted Kubaska,
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// Bob Norin, Tom Rowan, Shane Story, and Ping Tak Peter Tang of the
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// Computational Software Lab, Intel Corporation.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://developer.intel.com/opensource.
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//
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// History
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//==============================================================
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// 10/25/2000: Created
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//==============================================================
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//
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// API
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//==============================================================
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// double round(double x)
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//
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#include "libm_support.h"
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// general input registers:
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//
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round_GR_half = r14
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round_GR_big = r15
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round_GR_expmask = r16
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round_GR_signexp = r17
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round_GR_exp = r18
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round_GR_expdiff = r19
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// predicate registers used:
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// p6 - p10
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// floating-point registers used:
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ROUND_NORM_f8 = f9
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ROUND_TRUNC_f8 = f10
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ROUND_RINT_f8 = f11
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ROUND_FLOAT_TRUNC_f8 = f12
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ROUND_FLOAT_RINT_f8 = f13
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ROUND_REMAINDER = f14
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ROUND_HALF = f15
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// Overview of operation
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//==============================================================
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// double round(double x)
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// Return an integer value (represented as a double) that is x
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// rounded to nearest integer, halfway cases rounded away from
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// zero.
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// if x>0 result = trunc(x+0.5)
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// if x<0 result = trunc(x-0.5)
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// *******************************************************************************
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// Set denormal flag for denormal input and
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// and take denormal fault if necessary.
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// If x is NAN, ZERO, INFINITY, or >= 2^52 then return
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// qnan snan inf norm unorm 0 -+
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// 1 1 1 0 0 1 11 0xe7
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.align 32
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.global round#
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.section .text
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.proc round#
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.align 32
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round:
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// Get exponent for +0.5
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// Truncate x to integer
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{ .mfi
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addl round_GR_half = 0x0fffe, r0
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fcvt.fx.trunc.s1 ROUND_TRUNC_f8 = f8
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nop.i 999
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}
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// Get signexp of x
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// Normalize input
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// Form exponent mask
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{ .mfi
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getf.exp round_GR_signexp = f8
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fnorm ROUND_NORM_f8 = f8
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addl round_GR_expmask = 0x1ffff, r0 ;;
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}
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// Form +0.5
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// Round x to integer
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{ .mfi
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setf.exp ROUND_HALF = round_GR_half
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fcvt.fx.s1 ROUND_RINT_f8 = f8
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nop.i 999 ;;
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}
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// Get exp of x
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// Test for NAN, INF, ZERO
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// Get exponent at which input has no fractional part
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{ .mfi
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and round_GR_exp = round_GR_expmask, round_GR_signexp
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fclass.m p8,p9 = f8,0xe7
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addl round_GR_big = 0x10033, r0 ;;
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}
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// Get exp-bigexp
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// If exp is so big there is no fractional part, then turn on p8, off p9
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{ .mmi
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sub round_GR_expdiff = round_GR_exp, round_GR_big ;;
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#ifdef _LIBC
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(p9) cmp.lt.or.andcm p8,p9 = r0, round_GR_expdiff
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#else
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(p9) cmp.ge.or.andcm p8,p9 = round_GR_expdiff, r0
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#endif
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nop.i 999 ;;
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}
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// Set p6 if x<0, else set p7
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{ .mfi
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nop.m 999
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(p9) fcmp.lt.unc p6,p7 = f8,f0
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nop.i 999
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}
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// If NAN, INF, ZERO, or no fractional part, result is just normalized input
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{ .mfi
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nop.m 999
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(p8) fnorm.d.s0 f8 = f8
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nop.i 999 ;;
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}
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// Float the truncated integer
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{ .mfi
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nop.m 999
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(p9) fcvt.xf ROUND_FLOAT_TRUNC_f8 = ROUND_TRUNC_f8
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nop.i 999 ;;
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}
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// Float the rounded integer to get preliminary result
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{ .mfi
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nop.m 999
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(p9) fcvt.xf ROUND_FLOAT_RINT_f8 = ROUND_RINT_f8
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nop.i 999 ;;
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}
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// If x<0 and the difference of the truncated input minus the input is 0.5
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// then result = truncated input - 1.0
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// Else if x>0 and the difference of the input minus truncated input is 0.5
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// then result = truncated input + 1.0
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// Else
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// result = rounded input
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// Endif
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{ .mfi
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nop.m 999
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(p6) fsub.s1 ROUND_REMAINDER = ROUND_FLOAT_TRUNC_f8, ROUND_NORM_f8
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nop.i 999
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}
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{ .mfi
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nop.m 999
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(p7) fsub.s1 ROUND_REMAINDER = ROUND_NORM_f8, ROUND_FLOAT_TRUNC_f8
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nop.i 999 ;;
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}
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// Assume preliminary result is rounded integer
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{ .mfi
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nop.m 999
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(p9) fnorm.d.s0 f8 = ROUND_FLOAT_RINT_f8
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nop.i 999
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}
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// If x<0, test if result=0
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{ .mfi
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nop.m 999
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(p6) fcmp.eq.unc p10,p0 = ROUND_FLOAT_RINT_f8,f0
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nop.i 999 ;;
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}
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// If x<0 and result=0, set result=-0
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{ .mfi
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nop.m 999
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(p10) fmerge.ns f8 = f1,f8
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nop.i 999
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}
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// If x<0, test if remainder=0.5
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{ .mfi
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nop.m 999
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(p6) fcmp.eq.unc p6,p0 = ROUND_REMAINDER, ROUND_HALF
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nop.i 999 ;;
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}
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// If x>0, test if remainder=0.5
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{ .mfi
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nop.m 999
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(p7) fcmp.eq.unc p7,p0 = ROUND_REMAINDER, ROUND_HALF
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nop.i 999 ;;
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}
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// If x<0 and remainder=0.5, result=truncated-1.0
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// If x>0 and remainder=0.5, result=truncated+1.0
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// Exit
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.pred.rel "mutex",p6,p7
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{ .mfi
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nop.m 999
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(p6) fsub.d.s0 f8 = ROUND_FLOAT_TRUNC_f8,f1
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nop.i 999
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}
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{ .mfb
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nop.m 999
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(p7) fadd.d.s0 f8 = ROUND_FLOAT_TRUNC_f8,f1
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br.ret.sptk b0 ;;
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}
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.endp round
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ASM_SIZE_DIRECTIVE(round)
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