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d5b411854f
A number of functions in the sysdeps/powerpc/powerpc64/ tree don't use or change r2, yet declare a global entry that sets up r2. This patch fixes that problem, and consolidates the ENTRY and EALIGN macros. * sysdeps/powerpc/powerpc64/sysdep.h: Formatting. (NOPS, ENTRY_3): New macros. (ENTRY): Rewrite. (ENTRY_TOCLESS): Define. (EALIGN, EALIGN_W_0, EALIGN_W_1, EALIGN_W_2, EALIGN_W_4, EALIGN_W_5, EALIGN_W_6, EALIGN_W_7, EALIGN_W_8): Delete. * sysdeps/powerpc/powerpc64/a2/memcpy.S: Replace EALIGN with ENTRY. * sysdeps/powerpc/powerpc64/dl-trampoline.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strstr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcasestr.S: Likewise. * sysdeps/powerpc/powerpc64/addmul_1.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/powerpc64/cell/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_fabsl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc64/lshift.S: Likewise. * sysdeps/powerpc/powerpc64/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/mul_1.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power7/add_n.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memmove.S: Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcasecmp.S (strcasecmp_l): Likewise. * sysdeps/powerpc/powerpc64/power7/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strchrnul.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strspn.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/ppc-mcount.S: Store LR earlier. Don't add nop when SHARED. * sysdeps/powerpc/powerpc64/start.S: Fix comment. * sysdeps/powerpc/powerpc64/multiarch/strrchr-power8.S (ENTRY): Don't define. (ENTRY_TOCLESS): Define. * sysdeps/powerpc/powerpc32/sysdep.h (ENTRY_TOCLESS): Define. * sysdeps/powerpc/fpu/s_fma.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/fpu/s_fmaf.S: Likewise.
204 lines
7.2 KiB
ArmAsm
204 lines
7.2 KiB
ArmAsm
/* Optimized strlen implementation for PowerPC64.
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Copyright (C) 1997-2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* The algorithm here uses the following techniques:
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1) Given a word 'x', we can test to see if it contains any 0 bytes
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by subtracting 0x01010101, and seeing if any of the high bits of each
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byte changed from 0 to 1. This works because the least significant
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0 byte must have had no incoming carry (otherwise it's not the least
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significant), so it is 0x00 - 0x01 == 0xff. For all other
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byte values, either they have the high bit set initially, or when
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1 is subtracted you get a value in the range 0x00-0x7f, none of which
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have their high bit set. The expression here is
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(x + 0xfefefeff) & ~(x | 0x7f7f7f7f), which gives 0x00000000 when
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there were no 0x00 bytes in the word. You get 0x80 in bytes that
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match, but possibly false 0x80 matches in the next more significant
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byte to a true match due to carries. For little-endian this is
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of no consequence since the least significant match is the one
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we're interested in, but big-endian needs method 2 to find which
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byte matches.
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2) Given a word 'x', we can test to see _which_ byte was zero by
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calculating ~(((x & 0x7f7f7f7f) + 0x7f7f7f7f) | x | 0x7f7f7f7f).
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This produces 0x80 in each byte that was zero, and 0x00 in all
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the other bytes. The '| 0x7f7f7f7f' clears the low 7 bits in each
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byte, and the '| x' part ensures that bytes with the high bit set
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produce 0x00. The addition will carry into the high bit of each byte
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iff that byte had one of its low 7 bits set. We can then just see
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which was the most significant bit set and divide by 8 to find how
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many to add to the index.
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This is from the book 'The PowerPC Compiler Writer's Guide',
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by Steve Hoxey, Faraydon Karim, Bill Hay and Hank Warren.
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We deal with strings not aligned to a word boundary by taking the
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first word and ensuring that bytes not part of the string
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are treated as nonzero. To allow for memory latency, we unroll the
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loop a few times, being careful to ensure that we do not read ahead
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across cache line boundaries.
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Questions to answer:
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1) How long are strings passed to strlen? If they're often really long,
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we should probably use cache management instructions and/or unroll the
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loop more. If they're often quite short, it might be better to use
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fact (2) in the inner loop than have to recalculate it.
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2) How popular are bytes with the high bit set? If they are very rare,
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on some processors it might be useful to use the simpler expression
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~((x - 0x01010101) | 0x7f7f7f7f) (that is, on processors with only one
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ALU), but this fails when any character has its high bit set.
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Answer:
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1) Added a Data Cache Block Touch early to prefetch the first 128
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byte cache line. Adding dcbt instructions to the loop would not be
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effective since most strings will be shorter than the cache line. */
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/* Some notes on register usage: Under the SVR4 ABI, we can use registers
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0 and 3 through 12 (so long as we don't call any procedures) without
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saving them. We can also use registers 14 through 31 if we save them.
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We can't use r1 (it's the stack pointer), r2 nor r13 because the user
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program may expect them to hold their usual value if we get sent
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a signal. Integer parameters are passed in r3 through r10.
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We can use condition registers cr0, cr1, cr5, cr6, and cr7 without saving
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them, the others we must save. */
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/* int [r3] strlen (char *s [r3]) */
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#ifndef STRLEN
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# define STRLEN strlen
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#endif
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ENTRY_TOCLESS (STRLEN)
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CALL_MCOUNT 1
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#define rTMP4 r0
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#define rRTN r3 /* incoming STR arg, outgoing result */
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#define rSTR r4 /* current string position */
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#define rPADN r5 /* number of padding bits we prepend to the
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string to make it start at a word boundary */
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#define rFEFE r6 /* constant 0xfefefefefefefeff (-0x0101010101010101) */
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#define r7F7F r7 /* constant 0x7f7f7f7f7f7f7f7f */
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#define rWORD1 r8 /* current string doubleword */
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#define rWORD2 r9 /* next string doubleword */
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#define rMASK r9 /* mask for first string doubleword */
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#define rTMP1 r10
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#define rTMP2 r11
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#define rTMP3 r12
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dcbt 0,rRTN
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clrrdi rSTR, rRTN, 3
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lis r7F7F, 0x7f7f
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rlwinm rPADN, rRTN, 3, 26, 28
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ld rWORD1, 0(rSTR)
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addi r7F7F, r7F7F, 0x7f7f
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li rMASK, -1
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insrdi r7F7F, r7F7F, 32, 0
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/* We use method (2) on the first two doublewords, because rFEFE isn't
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required which reduces setup overhead. Also gives a faster return
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for small strings on big-endian due to needing to recalculate with
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method (2) anyway. */
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#ifdef __LITTLE_ENDIAN__
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sld rMASK, rMASK, rPADN
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#else
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srd rMASK, rMASK, rPADN
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#endif
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and rTMP1, r7F7F, rWORD1
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or rTMP2, r7F7F, rWORD1
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lis rFEFE, -0x101
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add rTMP1, rTMP1, r7F7F
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addi rFEFE, rFEFE, -0x101
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nor rTMP3, rTMP2, rTMP1
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and. rTMP3, rTMP3, rMASK
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mtcrf 0x01, rRTN
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bne L(done0)
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sldi rTMP1, rFEFE, 32
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add rFEFE, rFEFE, rTMP1
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/* Are we now aligned to a doubleword boundary? */
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bt 28, L(loop)
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/* Handle second doubleword of pair. */
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/* Perhaps use method (1) here for little-endian, saving one instruction? */
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ldu rWORD1, 8(rSTR)
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and rTMP1, r7F7F, rWORD1
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or rTMP2, r7F7F, rWORD1
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add rTMP1, rTMP1, r7F7F
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nor. rTMP3, rTMP2, rTMP1
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bne L(done0)
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/* The loop. */
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L(loop):
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ld rWORD1, 8(rSTR)
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ldu rWORD2, 16(rSTR)
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add rTMP1, rFEFE, rWORD1
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nor rTMP2, r7F7F, rWORD1
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and. rTMP1, rTMP1, rTMP2
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add rTMP3, rFEFE, rWORD2
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nor rTMP4, r7F7F, rWORD2
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bne L(done1)
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and. rTMP3, rTMP3, rTMP4
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beq L(loop)
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#ifndef __LITTLE_ENDIAN__
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and rTMP1, r7F7F, rWORD2
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add rTMP1, rTMP1, r7F7F
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andc rTMP3, rTMP4, rTMP1
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b L(done0)
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L(done1):
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and rTMP1, r7F7F, rWORD1
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subi rSTR, rSTR, 8
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add rTMP1, rTMP1, r7F7F
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andc rTMP3, rTMP2, rTMP1
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/* When we get to here, rSTR points to the first doubleword in the string that
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contains a zero byte, and rTMP3 has 0x80 for bytes that are zero, and 0x00
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otherwise. */
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L(done0):
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cntlzd rTMP3, rTMP3
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subf rTMP1, rRTN, rSTR
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srdi rTMP3, rTMP3, 3
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add rRTN, rTMP1, rTMP3
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blr
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#else
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L(done0):
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addi rTMP1, rTMP3, -1 /* Form a mask from trailing zeros. */
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andc rTMP1, rTMP1, rTMP3
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cntlzd rTMP1, rTMP1 /* Count bits not in the mask. */
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subf rTMP3, rRTN, rSTR
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subfic rTMP1, rTMP1, 64-7
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srdi rTMP1, rTMP1, 3
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add rRTN, rTMP1, rTMP3
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blr
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L(done1):
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addi rTMP3, rTMP1, -1
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andc rTMP3, rTMP3, rTMP1
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cntlzd rTMP3, rTMP3
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subf rTMP1, rRTN, rSTR
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subfic rTMP3, rTMP3, 64-7-64
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sradi rTMP3, rTMP3, 3
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add rRTN, rTMP1, rTMP3
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blr
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#endif
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END (STRLEN)
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libc_hidden_builtin_def (strlen)
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