glibc/sysdeps/standalone/i960/i960ca.h
Ulrich Drepper f41c80910d Update.
1997-08-24 12:24  Ulrich Drepper  <drepper@cygnus.com>

	* configure.in (INSTALL): Quote `$'.

	* libc.map: Add __xpg_basename.

	* csu/Makefile (initfini.s): Disable optimization.

	* elf/dl-deps.c: Implement handling of DL_FILTER.

	* elf/dl-load.c (_dl_init_paths): Add error check.

	* intl/finddomain.c (_nl_find_domain): Correct comment.
	* intl/localealias.c: Include <bits/libc-lock.h> not <libc-lock.h>.

	* libio/stdio.h: Make {,v}snprintf available if __USE_BSD.
	Change extern inline functions to work correctly in C++.

	* locale/iso-4217.def: Update for more recent ISO 4217 version.

	* locale/loadlocale.c (_nl_load_locale): Add cast.

	* manual/message.texi: Finish gettext section.

	* posix/getopt_init.c: Don't use relative #include path.
	(__getopt_clean_environment): Change function to take pointer to
	environment as argument.  Optimize generation of test string a bit.
	* sysdeps/unix/sysv/linux/init-first.c: Call __getopt_clean_environment
	with additional argument.

	* poisx/glob.c: Add prototype for next_brace_sub.

	* sysdeps/generic/dl-sysdep.c: Recognize AT_BASE value on auxiliary
	vector.

	* sysdeps/i386/dl-machine.h (elf_machine_load_address): Rewrite
	to not generate relocation entry.  Suggested by Richard Henderson.
	(ELF_MACHINE_BEFORE_RTLD_RELOC): Removed.
	(elf_machine_runtime_setup): Add .aligns.

	* sysdeps/i386/fpu/fraiseexcpt.c: Add volatile to asms.

	* sysdeps/i386/fpu/bits/mathinline.h: Partially undo change of
	1997-08-14 03:14.  gcc 2.7.2* is really broken in some aspects.

	* sysdeps/standalone/i386/i386.h: Clean up asm statements a bit.
	* sysdeps/standalone/i960/i960ca.h: Likewise.

1997-08-22 19:04  Richard Henderson  <rth@cygnus.com>

	* elf/rtld.c (_dl_start): Init _dl_rtld_map.l_opencount due to
	undocumented test addition in _dl_map_object.

	Support ET_EXEC versions of ld.so, for debugging at least:

	* elf/dl-load.c (_dl_map_object): Add_name_to_object could get
	called despite the DT_SONAME != NULL test, segfaulting.  Simplify
	the code here as well.
	* elf/dl-lookup.c (do_lookup): Skip objects with no symtab.
	(_dl_setup_hash): Likewise for hash tables.
	* elf/dl-version.c (_dl_check_map_versions): Likewise for strtabs.
	* elf/rtld.c (_dl_start): Likewise for rpath.
	(_dl_rtld_libname2): New variable.
	(dl_main): Use it to add an soname for ourselves when we don't have
	one of our own.  Base it on the target's .interp.
	(dl_main): Again, skip printing of objects that don't have strtabs.

	Sparc 32 merge:

	* elf/dl-runtime.c (ELF_FIXUP_RETURN_VALUE): Provide default value.
	(fixup): Simplify code.  Use ELF_FIXUP_RETURN_VALUE.
	(profile_fixup): Likewise, though this still needs fixing for
	Sparc32 and PPC.
	* sysdeps/powerpc/dl-machine.h: Transmute ELF_FIXUP_RETURNS_ADDRESS
	to ELF_FIXUP_RETURN_VALUE.

	* sysdeps/sparc/sparc32/dl-machine.h: Implement lazy relocation.
	Fix up _dl_start_user to handle _dl_skip_args properly.
	Use _dl_hwcap to determine if "flush" is available/needed.

	* sysdeps/sparc/configure.in: Remove.  It doesn't actually do
	anything anymore, and what it did do is done somewhere else.
	* sysdeps/sparc/configure: Likewise.

	* sysdeps/sparc/fpu/bits/mathdef.h (FP_ILOGB0, FP_ILOGBNAN): New.

	* sysdeps/sparc/fpu/fraiseexcpt.c: Rearrange for smaller code.

	* sysdeps/sparc/sparc32/Makefile: Fix sparc->sparc/sparc32 bits
	in divrem expansions.

	* sysdeps/unix/sysv/linux/sparc/sparc32/sysdep.h (END, LOC): New
	definitions for assembly syntax differences.

	* sysdeps/sparc/sparc32/__longjmp.S: %g6,%g7 are reserved to the
	"system".  Use %g2,%g3 instead.  Use new local label macro.
	* sysdeps/sparc/sparc32/add_n.S: Use <sysdep.h> and ENTRY, END,
	and LOC for proper assembly headers/footers.
	* sysdeps/sparc/sparc32/addmul_1.S: Likewise.
	* sysdeps/sparc/sparc32/alloca.S: Likewise.
	* sysdeps/sparc/sparc32/dotmul.S: Likewise.
	* sysdeps/sparc/sparc32/lshift.S: Likewise.
	* sysdeps/sparc/sparc32/mul_1.S: Likewise.
	* sysdeps/sparc/sparc32/rshift.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv8/addmul_1.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv8/mul_1.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv8/submul_1.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv8/udiv_qrnnd.S: Likewise.
	* sysdeps/sparc/sparc32/sub_n.S: Likewise.
	* sysdeps/sparc/sparc32/submul_1.S: Likewise.
	* sysdeps/sparc/sparc32/udiv_qrnnd.S: Likewise.
	* sysdeps/sparc/sparc32/umul.S: Likewise.
	* sysdeps/sparc/sparc32/divrem.m4: Likewise.
	* sysdeps/sparc/sparc32/rem.S: Regenerate.
	* sysdeps/sparc/sparc32/sdiv.S: Regenerate.
	* sysdeps/sparc/sparc32/udiv.S: Regenerate.
	* sysdeps/sparc/sparc32/urem.S: Regenerate.

	* sysdeps/sparc/sparc32/sparcv8/dotmul.S: New file.
	* sysdeps/sparc/sparc32/sparcv8/rem.S: New file.
	* sysdeps/sparc/sparc32/sparcv8/sdiv.S: New file.
	* sysdeps/sparc/sparc32/sparcv8/udiv.S: New file.
	* sysdeps/sparc/sparc32/sparcv8/umul.S: New file.
	* sysdeps/sparc/sparc32/sparcv8/urem.S: New file.

	* sysdeps/sparc/sparc32/bsd-_setjmp.S: Dike out.
	* sysdeps/sparc/sparc32/bsd-setjmp.S: Likewise.
	* sysdeps/sparc/sparc32/setjmp.S: Add _setjmp and setjmp entry points.

	* sysdeps/unix/sysv/linux/sparc/sparc32/__sigtrampoline.S:
	Clean up PIC code.

	* sysdeps/sparc/sparc32/elf/start.S: New file, slightly modified
	from the sparc64 version.
	* sysdeps/sparc/sparc32/elf/start.c: Removed.

	* sysdeps/unix/sysv/linux/sparc/sparc32/init-first.h: Rewrite in
	assembly based on the sparc64 version.

	* sysdeps/sparc/sparc32/fpu/bits/fenv.h: Duh.  Use proper syntax
	for manipulating %fsr.
	* sysdeps/sparc/sparc32/fpu/fpu_control.h: Make IEEE conformance
	be the default.

	* elf/elf.h (HWCAP_SPARC_*): New definitions.
	* elf/rtld.c (_dl_hwcap): New variable.
	* sysdeps/generic/dl-sysdep.c (_dl_sysdep_start): Record AT_HWCAP.

	* sysdeps/unix/sysv/linux/sparc/sparc32/getpagesize.c: New file.
	Attempt to get hold of the page size based on what we might have
	been told at startup time in _dl_pagesize.  This will be obsolete
	when I finish the kernel hooks for a proper sysconf(), stay tuned.

	Sparc 64 merge:

	* sysdeps/sparc/sparc64/dl-machine.h (ELF_FIXUP_RETURN_VALUE): New.
	Figure out the right thing to return based on the .plt format.

	* sysdeps/sparc/sparc64/fpu/fpu_control.h: Update comment.

	* sysdeps/unix/sysv/linux/sparc/sparc64/bits/types.h (__dev_t):
	Should have been 64-bits wide.

	* sysdeps/unix/sysv/linux/sparc/sparc64/init-first.h: sll->sllx,
	optimize for branch delay slot usage.

1997-08-22  Andreas Schwab  <schwab@issan.informatik.uni-dortmund.de>

	* csu/Makefile ($(objpfx)crt%.o): Fix a missing *.so -> *.os
	change.

1997-08-20  Andreas Jaeger  <aj@arthur.rhein-neckar.de>

	* math/libm-test.c (identities): Change epsilon.

	* sysdeps/i386/fpu/bits/mathinline.h: Correct arguments to fabs,
	fabsf, fabsl, __fabsl.

	* sysdeps/libm-i387/e_remainderl.S: Pop extra value from FPU stack.
	* sysdeps/libm-ieee754/s_csinhl.c: Include <fenv.h>.
1997-08-24 10:55:18 +00:00

207 lines
7.9 KiB
C

/* Copyright (C) 1994, 1996, 1997 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Joel Sherrill (jsherril@redstone-emh2.army.mil),
On-Line Applications Research Corporation.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with the GNU C Library; see the file COPYING.LIB. If not,
write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* i960ca.h
*
* This file contains macros which are used to access i80960CA
* registers which are not addressable by C. The functions
* in this file should be useful to the developer of target
* specific code.
*/
#ifndef i960ca_h__
#define i960ca_h__
typedef unsigned char unsigned8;
typedef unsigned short unsigned16;
typedef unsigned int unsigned32;
/*
* Intel i80960CA Processor Control Block
*/
struct i80960ca_prcb {
unsigned32 *fault_tbl; /* fault table base address */
struct i80960ca_ctltbl
*control_tbl; /* control table base address */
unsigned32 initial_ac; /* AC register initial value */
unsigned32 fault_config; /* fault configuration word */
void *intr_tbl; /* interrupt table base address */
void *sys_proc_tbl; /* system procedure table */
/* base address */
unsigned32 reserved; /* reserved */
unsigned32 *intr_stack; /* interrupt stack pointer */
unsigned32 ins_cache_cfg; /* instruction cache */
/* configuration word */
unsigned32 reg_cache_cfg; /* register cache */
/* configuration word */
};
/*
* Intel i80960CA Control Table
*/
struct i80960ca_ctltbl {
/* Control Group 0 */
unsigned32 ipb0; /* IP breakpoint 0 */
unsigned32 ipb1; /* IP breakpoint 1 */
unsigned32 dab0; /* data address breakpoint 0 */
unsigned32 dab1; /* data address breakpoint 1 */
/* Control Group 1 */
unsigned32 imap0; /* interrupt map 0 */
unsigned32 imap1; /* interrupt map 1 */
unsigned32 imap2; /* interrupt map 2 */
unsigned32 icon; /* interrupt control */
/* Control Group 2 */
unsigned32 mcon0; /* memory region 0 configuration */
unsigned32 mcon1; /* memory region 1 configuration */
unsigned32 mcon2; /* memory region 2 configuration */
unsigned32 mcon3; /* memory region 3 configuration */
/* Control Group 3 */
unsigned32 mcon4; /* memory region 4 configuration */
unsigned32 mcon5; /* memory region 5 configuration */
unsigned32 mcon6; /* memory region 6 configuration */
unsigned32 mcon7; /* memory region 7 configuration */
/* Control Group 4 */
unsigned32 mcon8; /* memory region 8 configuration */
unsigned32 mcon9; /* memory region 9 configuration */
unsigned32 mcon10; /* memory region 10 configuration */
unsigned32 mcon11; /* memory region 11 configuration */
/* Control Group 5 */
unsigned32 mcon12; /* memory region 12 configuration */
unsigned32 mcon13; /* memory region 13 configuration */
unsigned32 mcon14; /* memory region 14 configuration */
unsigned32 mcon15; /* memory region 15 configuration */
/* Control Group 6 */
unsigned32 bpcon; /* breakpoint control */
unsigned32 tc; /* trace control */
unsigned32 bcon; /* bus configuration control */
unsigned32 reserved; /* reserved */
};
#define disable_intr( oldlevel ) \
{ (oldlevel) = 0x1f0000; \
asm volatile ( "modpc 0,%1,%1" \
: "=d" ((oldlevel)) \
: "0" ((oldlevel)) ); \
}
#define enable_intr( oldlevel ) \
{ unsigned32 _mask = 0x1f0000; \
asm volatile ( "modpc 0,%0,%1" \
: "=d" (_mask), "=d" ((oldlevel)) \
: "0" (_mask), "1" ((oldlevel)) ); \
}
#define flash_intr( oldlevel ) \
{ unsigned32 _mask = 0x1f0000; \
asm volatile ( "modpc 0,%0,%1 ; \
mov %0,%1 ; \
modpc 0,%0,%1" \
: "=d" (_mask), "=d" ((oldlevel)) \
: "0" (_mask), "1" ((oldlevel)) ); \
}
#define atomic_modify( mask, addr, prev ) \
{ register unsigned32 _mask = (mask); \
register unsigned32 *_addr = (unsigned32 *)(addr); \
asm volatile( "atmod %0,%1,%1" \
: "=d" (_addr), "=d" (_mask) \
: "0" (_addr), "1" (_mask) ); \
(prev) = _mask; \
}
#define delay( microseconds ) \
{ register unsigned32 _delay=(microseconds); \
register unsigned32 _tmp; \
asm volatile( "delay0: \
remo 3,31,%0 ; \
cmpo 0,%0 ; \
subo 1,%1,%1 ; \
cmpobne.t 0,%1,delay0 " \
: "=d" (_tmp), "=d" (_delay) \
: "0" (_tmp), "1" (_delay) ); \
}
#define enable_tracing() \
{ register unsigned32 _pc = 0x1; \
asm volatile( "modpc 0,%0,%0" : "=d" (_pc) : "0" (_pc) ); \
}
#define unmask_intr( xint ) \
{ register unsigned32 _mask= (1<<(xint)); \
asm volatile( "or sf1,%0,sf1" : "=d" (_mask) : "0" (_mask) ); \
}
#define mask_intr( xint ) \
{ register unsigned32 _mask= (1<<(xint)); \
asm volatile( "andnot %0,sf1,sf1" : "=d" (_mask) : "0" (_mask) ); \
}
#define clear_intr( xint ) \
{ register unsigned32 _xint=(xint); \
asm volatile( "loop_til_cleared:" \
" clrbit %0,sf0,sf0 ;" \
" bbs %0,sf0,loop_til_cleared" \
: "=d" (_xint) : "0" (_xint) ); \
}
#define reload_ctl_group( group ) \
{ register int _cmd = ((group)|0x400) ; \
asm volatile( "sysctl %0,%0,%0" : "=d" (_cmd) : "0" (_cmd) ); \
}
#define cause_intr( intr ) \
{ register int _intr = (intr); \
asm volatile( "sysctl %0,%0,%0" : "=d" (_intr) : "0" (_intr) ); \
}
#define soft_reset( prcb ) \
{ register struct i80960ca_prcb *_prcb = (prcb); \
register unsigned32 *_next=0; \
register unsigned32 _cmd = 0x30000; \
asm volatile( "lda next,%1; \
sysctl %0,%1,%2; \
next: mov g0,g0" \
: "=d" (_cmd), "=d" (_next), "=d" (_prcb) \
: "0" (_cmd), "1" (_next), "2" (_prcb) ); \
}
static inline unsigned32 pend_intrs()
{ register unsigned32 _intr=0;
asm volatile( "mov sf0,%0" : "=d" (_intr) : "0" (_intr) );
return ( _intr );
}
static inline unsigned32 mask_intrs()
{ register unsigned32 _intr=0;
asm volatile( "mov sf1,%0" : "=d" (_intr) : "0" (_intr) );
return( _intr );
}
static inline unsigned32 get_fp()
{ register unsigned32 _fp=0;
asm volatile( "mov fp,%0" : "=d" (_fp) : "0" (_fp) );
return ( _fp );
}
#endif
/* end of include file */