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cc0d77ba94
Compilers may emit calls to 'half-width' routines (two-lane single-precision variants). These have been added in the form of wrappers around the full-width versions, where the low half of the vector is simply duplicated. This will perform poorly when one lane triggers the special-case handler, as there will be a redundant call to the scalar version, however this is expected to be rare at Ofast. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
97 lines
3.1 KiB
C
97 lines
3.1 KiB
C
/* Single-precision vector (Advanced SIMD) cos function.
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Copyright (C) 2023 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include "v_math.h"
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static const struct data
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{
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float32x4_t poly[4];
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float32x4_t range_val, inv_pi, half_pi, shift, pi_1, pi_2, pi_3;
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} data = {
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/* 1.886 ulp error. */
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.poly = { V4 (-0x1.555548p-3f), V4 (0x1.110df4p-7f), V4 (-0x1.9f42eap-13f),
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V4 (0x1.5b2e76p-19f) },
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.pi_1 = V4 (0x1.921fb6p+1f),
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.pi_2 = V4 (-0x1.777a5cp-24f),
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.pi_3 = V4 (-0x1.ee59dap-49f),
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.inv_pi = V4 (0x1.45f306p-2f),
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.shift = V4 (0x1.8p+23f),
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.half_pi = V4 (0x1.921fb6p0f),
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.range_val = V4 (0x1p20f)
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};
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#define C(i) d->poly[i]
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static float32x4_t VPCS_ATTR NOINLINE
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special_case (float32x4_t x, float32x4_t y, uint32x4_t odd, uint32x4_t cmp)
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{
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/* Fall back to scalar code. */
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y = vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd));
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return v_call_f32 (cosf, x, y, cmp);
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}
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float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (cos) (float32x4_t x)
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{
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const struct data *d = ptr_barrier (&data);
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float32x4_t n, r, r2, r3, y;
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uint32x4_t odd, cmp;
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#if WANT_SIMD_EXCEPT
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r = vabsq_f32 (x);
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cmp = vcgeq_u32 (vreinterpretq_u32_f32 (r),
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vreinterpretq_u32_f32 (d->range_val));
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if (__glibc_unlikely (v_any_u32 (cmp)))
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/* If fenv exceptions are to be triggered correctly, set any special lanes
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to 1 (which is neutral w.r.t. fenv). These lanes will be fixed by
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special-case handler later. */
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r = vbslq_f32 (cmp, v_f32 (1.0f), r);
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#else
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cmp = vcageq_f32 (d->range_val, x);
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cmp = vceqzq_u32 (cmp); /* cmp = ~cmp. */
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r = x;
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#endif
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/* n = rint((|x|+pi/2)/pi) - 0.5. */
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n = vfmaq_f32 (d->shift, d->inv_pi, vaddq_f32 (r, d->half_pi));
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odd = vshlq_n_u32 (vreinterpretq_u32_f32 (n), 31);
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n = vsubq_f32 (n, d->shift);
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n = vsubq_f32 (n, v_f32 (0.5f));
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/* r = |x| - n*pi (range reduction into -pi/2 .. pi/2). */
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r = vfmsq_f32 (r, d->pi_1, n);
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r = vfmsq_f32 (r, d->pi_2, n);
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r = vfmsq_f32 (r, d->pi_3, n);
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/* y = sin(r). */
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r2 = vmulq_f32 (r, r);
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r3 = vmulq_f32 (r2, r);
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y = vfmaq_f32 (C (2), C (3), r2);
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y = vfmaq_f32 (C (1), y, r2);
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y = vfmaq_f32 (C (0), y, r2);
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y = vfmaq_f32 (r, y, r3);
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if (__glibc_unlikely (v_any_u32 (cmp)))
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return special_case (x, y, odd, cmp);
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return vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd));
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}
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libmvec_hidden_def (V_NAME_F1 (cos))
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HALF_WIDTH_ALIAS_F1 (cos)
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