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04277e02d7
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115 lines
3.8 KiB
C
115 lines
3.8 KiB
C
/* Install given floating-point environment.
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Copyright (C) 2001-2019 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <fenv.h>
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#include <fpu_control.h>
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#include <assert.h>
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/* All exceptions, including the x86-specific "denormal operand"
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exception. */
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#define FE_ALL_EXCEPT_X86 (FE_ALL_EXCEPT | __FE_DENORM)
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int
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__fesetenv (const fenv_t *envp)
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{
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fenv_t temp;
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/* Install the environment specified by ENVP. But there are a few
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values which we do not want to come from the saved environment.
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Therefore, we get the current environment and replace the values
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we want to use from the environment specified by the parameter. */
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__asm__ ("fnstenv %0\n"
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"stmxcsr %1" : "=m" (*&temp), "=m" (*&temp.__mxcsr));
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if (envp == FE_DFL_ENV)
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{
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temp.__control_word |= FE_ALL_EXCEPT_X86;
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temp.__control_word &= ~FE_TOWARDZERO;
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temp.__control_word |= _FPU_EXTENDED;
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temp.__status_word &= ~FE_ALL_EXCEPT_X86;
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temp.__eip = 0;
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temp.__cs_selector = 0;
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temp.__opcode = 0;
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temp.__data_offset = 0;
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temp.__data_selector = 0;
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/* Clear SSE exceptions. */
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temp.__mxcsr &= ~FE_ALL_EXCEPT_X86;
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/* Set mask for SSE MXCSR. */
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temp.__mxcsr |= (FE_ALL_EXCEPT_X86 << 7);
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/* Set rounding to FE_TONEAREST. */
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temp.__mxcsr &= ~ 0x6000;
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temp.__mxcsr |= (FE_TONEAREST << 3);
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/* Clear the FZ and DAZ bits. */
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temp.__mxcsr &= ~0x8040;
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}
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else if (envp == FE_NOMASK_ENV)
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{
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temp.__control_word &= ~(FE_ALL_EXCEPT | FE_TOWARDZERO);
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/* Keep the "denormal operand" exception masked. */
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temp.__control_word |= __FE_DENORM;
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temp.__control_word |= _FPU_EXTENDED;
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temp.__status_word &= ~FE_ALL_EXCEPT_X86;
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temp.__eip = 0;
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temp.__cs_selector = 0;
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temp.__opcode = 0;
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temp.__data_offset = 0;
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temp.__data_selector = 0;
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/* Clear SSE exceptions. */
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temp.__mxcsr &= ~FE_ALL_EXCEPT_X86;
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/* Set mask for SSE MXCSR. */
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/* Set rounding to FE_TONEAREST. */
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temp.__mxcsr &= ~ 0x6000;
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temp.__mxcsr |= (FE_TONEAREST << 3);
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/* Do not mask exceptions. */
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temp.__mxcsr &= ~(FE_ALL_EXCEPT << 7);
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/* Keep the "denormal operand" exception masked. */
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temp.__mxcsr |= (__FE_DENORM << 7);
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/* Clear the FZ and DAZ bits. */
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temp.__mxcsr &= ~0x8040;
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}
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else
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{
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temp.__control_word &= ~(FE_ALL_EXCEPT_X86
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| FE_TOWARDZERO
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| _FPU_EXTENDED);
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temp.__control_word |= (envp->__control_word
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& (FE_ALL_EXCEPT_X86
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| FE_TOWARDZERO
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| _FPU_EXTENDED));
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temp.__status_word &= ~FE_ALL_EXCEPT_X86;
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temp.__status_word |= envp->__status_word & FE_ALL_EXCEPT_X86;
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temp.__eip = envp->__eip;
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temp.__cs_selector = envp->__cs_selector;
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temp.__opcode = envp->__opcode;
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temp.__data_offset = envp->__data_offset;
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temp.__data_selector = envp->__data_selector;
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temp.__mxcsr = envp->__mxcsr;
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}
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__asm__ ("fldenv %0\n"
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"ldmxcsr %1" : : "m" (temp), "m" (temp.__mxcsr));
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/* Success. */
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return 0;
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}
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libm_hidden_def (__fesetenv)
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weak_alias (__fesetenv, fesetenv)
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libm_hidden_weak (fesetenv)
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