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ceabdcd130
1. Add default ISA level selection in non-multiarch/rtld
implementations.
2. Add ISA level build guards to different implementations.
- I.e strcmp-avx2.S which is ISA level 3 will only build if
compiled ISA level <= 3. Otherwise there is no reason to
include it as we will always use one of the ISA level 4
implementations (strcmp-evex.S).
3. Refactor the ifunc selector and ifunc implementation list to use
the ISA level aware wrapper macros that allow functions below the
compiled ISA level (with a guranteed replacement) to be skipped.
Tested with and without multiarch on x86_64 for ISA levels:
{generic, x86-64-v2, x86-64-v3, x86-64-v4}
And m32 with and without multiarch.
86 lines
2.9 KiB
C
86 lines
2.9 KiB
C
/* Multiple versions of strcmp.
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All versions must be listed in ifunc-impl-list.c.
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Copyright (C) 2017-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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/* Define multiple versions only for the definition in libc. */
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#if IS_IN (libc)
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# define strcmp __redirect_strcmp
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# include <string.h>
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# undef strcmp
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# define SYMBOL_NAME strcmp
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# include <init-arch.h>
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extern __typeof (REDIRECT_NAME) OPTIMIZE (evex) attribute_hidden;
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extern __typeof (REDIRECT_NAME) OPTIMIZE (avx2) attribute_hidden;
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extern __typeof (REDIRECT_NAME) OPTIMIZE (avx2_rtm) attribute_hidden;
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extern __typeof (REDIRECT_NAME) OPTIMIZE (sse42) attribute_hidden;
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extern __typeof (REDIRECT_NAME)
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OPTIMIZE (sse2_unaligned) attribute_hidden;
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extern __typeof (REDIRECT_NAME) OPTIMIZE (sse2) attribute_hidden;
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static inline void *
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IFUNC_SELECTOR (void)
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{
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const struct cpu_features *cpu_features = __get_cpu_features ();
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if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX2)
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&& X86_ISA_CPU_FEATURES_ARCH_P (cpu_features,
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AVX_Fast_Unaligned_Load, ))
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{
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if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)
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&& X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512BW)
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&& X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, BMI2))
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return OPTIMIZE (evex);
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if (CPU_FEATURE_USABLE_P (cpu_features, RTM))
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return OPTIMIZE (avx2_rtm);
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if (X86_ISA_CPU_FEATURES_ARCH_P (cpu_features,
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Prefer_No_VZEROUPPER, !))
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return OPTIMIZE (avx2);
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}
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if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)
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/* Keep this as runtime check. Some ISA level >= 2 CPUs such as
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Tremont, Silvermont, and more check this. */
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&& !CPU_FEATURES_ARCH_P (cpu_features, Slow_SSE4_2))
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return OPTIMIZE (sse42);
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/* Keep this as runtime check. The standard SSE2 version has
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meaningful optimizations around keeping all loads aligned in the
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main loop which can benefit some ISA level >= 2 CPUs. */
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if (CPU_FEATURES_ARCH_P (cpu_features, Fast_Unaligned_Load))
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return OPTIMIZE (sse2_unaligned);
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return OPTIMIZE (sse2);
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}
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libc_ifunc_redirected (__redirect_strcmp, strcmp, IFUNC_SELECTOR ());
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# ifdef SHARED
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__hidden_ver1 (strcmp, __GI_strcmp, __redirect_strcmp)
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__attribute__ ((visibility ("hidden"))) __attribute_copy__ (strcmp);
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# endif
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#endif
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