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d5b411854f
A number of functions in the sysdeps/powerpc/powerpc64/ tree don't use or change r2, yet declare a global entry that sets up r2. This patch fixes that problem, and consolidates the ENTRY and EALIGN macros. * sysdeps/powerpc/powerpc64/sysdep.h: Formatting. (NOPS, ENTRY_3): New macros. (ENTRY): Rewrite. (ENTRY_TOCLESS): Define. (EALIGN, EALIGN_W_0, EALIGN_W_1, EALIGN_W_2, EALIGN_W_4, EALIGN_W_5, EALIGN_W_6, EALIGN_W_7, EALIGN_W_8): Delete. * sysdeps/powerpc/powerpc64/a2/memcpy.S: Replace EALIGN with ENTRY. * sysdeps/powerpc/powerpc64/dl-trampoline.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strstr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcasestr.S: Likewise. * sysdeps/powerpc/powerpc64/addmul_1.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/powerpc64/cell/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_fabsl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc64/lshift.S: Likewise. * sysdeps/powerpc/powerpc64/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/mul_1.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power7/add_n.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memmove.S: Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcasecmp.S (strcasecmp_l): Likewise. * sysdeps/powerpc/powerpc64/power7/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strchrnul.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strspn.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/ppc-mcount.S: Store LR earlier. Don't add nop when SHARED. * sysdeps/powerpc/powerpc64/start.S: Fix comment. * sysdeps/powerpc/powerpc64/multiarch/strrchr-power8.S (ENTRY): Don't define. (ENTRY_TOCLESS): Define. * sysdeps/powerpc/powerpc32/sysdep.h (ENTRY_TOCLESS): Define. * sysdeps/powerpc/fpu/s_fma.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/fpu/s_fmaf.S: Likewise.
266 lines
6.5 KiB
ArmAsm
266 lines
6.5 KiB
ArmAsm
/* Optimized memset implementation for PowerPC64.
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Copyright (C) 1997-2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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.section ".toc","aw"
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.LC0:
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.tc __cache_line_size[TC],__cache_line_size
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.section ".text"
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.align 2
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/* __ptr_t [r3] memset (__ptr_t s [r3], int c [r4], size_t n [r5]));
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Returns 's'.
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The memset is done in three sizes: byte (8 bits), word (32 bits),
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cache line (256 bits). There is a special case for setting cache lines
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to 0, to take advantage of the dcbz instruction. */
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#ifndef MEMSET
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# define MEMSET memset
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#endif
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ENTRY (MEMSET, 5)
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CALL_MCOUNT 3
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#define rTMP r0
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#define rRTN r3 /* Initial value of 1st argument. */
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#define rMEMP0 r3 /* Original value of 1st arg. */
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#define rCHR r4 /* Char to set in each byte. */
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#define rLEN r5 /* Length of region to set. */
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#define rMEMP r6 /* Address at which we are storing. */
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#define rALIGN r7 /* Number of bytes we are setting now (when aligning). */
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#define rMEMP2 r8
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#define rNEG64 r8 /* Constant -64 for clearing with dcbz. */
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#define rCLS r8 /* Cache line size obtained from static. */
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#define rCLM r9 /* Cache line size mask to check for cache alignment. */
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L(_memset):
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/* Take care of case for size <= 4. */
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cmpldi cr1, rLEN, 8
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andi. rALIGN, rMEMP0, 7
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mr rMEMP, rMEMP0
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ble- cr1, L(small)
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/* Align to doubleword boundary. */
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cmpldi cr5, rLEN, 31
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insrdi rCHR, rCHR, 8, 48 /* Replicate byte to halfword. */
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beq+ L(aligned2)
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mtcrf 0x01, rMEMP0
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subfic rALIGN, rALIGN, 8
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cror 28,30,31 /* Detect odd word aligned. */
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add rMEMP, rMEMP, rALIGN
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sub rLEN, rLEN, rALIGN
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insrdi rCHR, rCHR, 16, 32 /* Replicate halfword to word. */
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bt 29, L(g4)
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/* Process the even word of doubleword. */
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bf+ 31, L(g2)
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stb rCHR, 0(rMEMP0)
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bt 30, L(g4x)
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L(g2):
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sth rCHR, -6(rMEMP)
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L(g4x):
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stw rCHR, -4(rMEMP)
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b L(aligned)
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/* Process the odd word of doubleword. */
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L(g4):
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bf 28, L(g4x) /* If false, word aligned on odd word. */
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bf+ 31, L(g0)
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stb rCHR, 0(rMEMP0)
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bt 30, L(aligned)
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L(g0):
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sth rCHR, -2(rMEMP)
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/* Handle the case of size < 31. */
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L(aligned2):
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insrdi rCHR, rCHR, 16, 32 /* Replicate halfword to word. */
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L(aligned):
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mtcrf 0x01, rLEN
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ble cr5, L(medium)
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/* Align to 32-byte boundary. */
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andi. rALIGN, rMEMP, 0x18
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subfic rALIGN, rALIGN, 0x20
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insrdi rCHR, rCHR, 32, 0 /* Replicate word to double word. */
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beq L(caligned)
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mtcrf 0x01, rALIGN
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add rMEMP, rMEMP, rALIGN
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sub rLEN, rLEN, rALIGN
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cmplwi cr1, rALIGN, 0x10
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mr rMEMP2, rMEMP
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bf 28, L(a1)
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stdu rCHR, -8(rMEMP2)
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L(a1): blt cr1, L(a2)
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std rCHR, -8(rMEMP2)
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stdu rCHR, -16(rMEMP2)
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L(a2):
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/* Now aligned to a 32 byte boundary. */
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L(caligned):
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cmpldi cr1, rCHR, 0
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clrrdi. rALIGN, rLEN, 5
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mtcrf 0x01, rLEN
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beq cr1, L(zloopstart) /* Special case for clearing memory using dcbz. */
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L(nondcbz):
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srdi rTMP, rALIGN, 5
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mtctr rTMP
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beq L(medium) /* We may not actually get to do a full line. */
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clrldi. rLEN, rLEN, 59
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add rMEMP, rMEMP, rALIGN
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li rNEG64, -0x40
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bdz L(cloopdone)
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L(c3): dcbtst rNEG64, rMEMP
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std rCHR, -8(rMEMP)
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std rCHR, -16(rMEMP)
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std rCHR, -24(rMEMP)
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stdu rCHR, -32(rMEMP)
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bdnz L(c3)
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L(cloopdone):
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std rCHR, -8(rMEMP)
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std rCHR, -16(rMEMP)
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cmpldi cr1, rLEN, 16
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std rCHR, -24(rMEMP)
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stdu rCHR, -32(rMEMP)
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beqlr
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add rMEMP, rMEMP, rALIGN
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b L(medium_tail2)
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.align 5
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/* Clear lines of memory in 128-byte chunks. */
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L(zloopstart):
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/* If the remaining length is less the 32 bytes, don't bother getting
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the cache line size. */
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beq L(medium)
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ld rCLS,.LC0@toc(r2)
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lwz rCLS,0(rCLS)
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/* If the cache line size was not set just goto to L(nondcbz) which is
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safe for any cache line size. */
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cmpldi cr1,rCLS,0
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beq cr1,L(nondcbz)
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/* Now we know the cache line size, and it is not 32-bytes, but
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we may not yet be aligned to the cache line. May have a partial
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line to fill, so touch it 1st. */
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dcbt 0,rMEMP
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addi rCLM,rCLS,-1
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L(getCacheAligned):
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cmpldi cr1,rLEN,32
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and. rTMP,rCLM,rMEMP
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blt cr1,L(handletail32)
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beq L(cacheAligned)
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addi rMEMP,rMEMP,32
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addi rLEN,rLEN,-32
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std rCHR,-32(rMEMP)
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std rCHR,-24(rMEMP)
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std rCHR,-16(rMEMP)
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std rCHR,-8(rMEMP)
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b L(getCacheAligned)
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/* Now we are aligned to the cache line and can use dcbz. */
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L(cacheAligned):
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cmpld cr1,rLEN,rCLS
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blt cr1,L(handletail32)
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dcbz 0,rMEMP
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subf rLEN,rCLS,rLEN
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add rMEMP,rMEMP,rCLS
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b L(cacheAligned)
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/* We are here because the cache line size was set and was not 32-bytes
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and the remainder (rLEN) is less than the actual cache line size.
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So set up the preconditions for L(nondcbz) and go there. */
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L(handletail32):
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clrrwi. rALIGN, rLEN, 5
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b L(nondcbz)
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.align 5
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L(small):
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/* Memset of 8 bytes or less. */
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cmpldi cr6, rLEN, 4
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cmpldi cr5, rLEN, 1
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ble cr6,L(le4)
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subi rLEN, rLEN, 4
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stb rCHR,0(rMEMP)
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stb rCHR,1(rMEMP)
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stb rCHR,2(rMEMP)
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stb rCHR,3(rMEMP)
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addi rMEMP,rMEMP, 4
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cmpldi cr5, rLEN, 1
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L(le4):
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cmpldi cr1, rLEN, 3
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bltlr cr5
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stb rCHR, 0(rMEMP)
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beqlr cr5
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stb rCHR, 1(rMEMP)
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bltlr cr1
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stb rCHR, 2(rMEMP)
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beqlr cr1
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stb rCHR, 3(rMEMP)
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blr
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/* Memset of 0-31 bytes. */
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.align 5
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L(medium):
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insrdi rCHR, rCHR, 32, 0 /* Replicate word to double word. */
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cmpldi cr1, rLEN, 16
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L(medium_tail2):
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add rMEMP, rMEMP, rLEN
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L(medium_tail):
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bt- 31, L(medium_31t)
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bt- 30, L(medium_30t)
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L(medium_30f):
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bt- 29, L(medium_29t)
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L(medium_29f):
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bge- cr1, L(medium_27t)
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bflr- 28
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std rCHR, -8(rMEMP)
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blr
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L(medium_31t):
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stbu rCHR, -1(rMEMP)
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bf- 30, L(medium_30f)
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L(medium_30t):
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sthu rCHR, -2(rMEMP)
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bf- 29, L(medium_29f)
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L(medium_29t):
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stwu rCHR, -4(rMEMP)
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blt- cr1, L(medium_27f)
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L(medium_27t):
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std rCHR, -8(rMEMP)
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stdu rCHR, -16(rMEMP)
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L(medium_27f):
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bflr- 28
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L(medium_28t):
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std rCHR, -8(rMEMP)
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blr
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END_GEN_TB (MEMSET,TB_TOCLESS)
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libc_hidden_builtin_def (memset)
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#ifndef NO_BZERO_IMPL
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/* Copied from bzero.S to prevent the linker from inserting a stub
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between bzero and memset. */
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ENTRY (__bzero)
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CALL_MCOUNT 3
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mr r5,r4
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li r4,0
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b L(_memset)
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END_GEN_TB (__bzero,TB_TOCLESS)
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weak_alias (__bzero, bzero)
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#endif
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