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41bdb6e20c
2001-07-06 Paul Eggert <eggert@twinsun.com> * manual/argp.texi: Remove ignored LGPL copyright notice; it's not appropriate for documentation anyway. * manual/libc-texinfo.sh: "Library General Public License" -> "Lesser General Public License". 2001-07-06 Andreas Jaeger <aj@suse.de> * All files under GPL/LGPL version 2: Place under LGPL version 2.1.
88 lines
2.8 KiB
ArmAsm
88 lines
2.8 KiB
ArmAsm
/* Copyright (C) 1994, 1997 Free Software Foundation, Inc.
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Contributed by Joel Sherrill (jsherril@redstone-emh2.army.mil),
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On-Line Applications Research Corporation.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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/* This file assists the board independent startup code by
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* loading the proper segment register values. The values
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* loaded are dependent on the FORCEBUG.
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*
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* NOTE: No stack has been established when this routine
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* is invoked. It returns by jumping back to the start code.
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*
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*/
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/*
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* FORCEBUG loads us into a virtual address space which
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* really starts at PHYSICAL_ADDRESS_BASE.
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*
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*/
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.set PHYSICAL_ADDRESS_BASE, 0x00002000
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/*
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* At reset time, FORCEBUG normally has the segment selectors preloaded.
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* If a human resets the instruction pointer, this will not have occurred.
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* However, no guarantee can be made of the other registers if cs:ip was
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* modified to restart the program. Because of this, the BSP reloads all
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* segment registers (except cs) with the values they have following
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* a reset.
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*/
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.set RESET_SS, 0x40 # initial value of stack segment register
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.set RESET_DS, 0x40 # initial value of data segment register
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.set RESET_ES, 0x40 # initial value of extra segment register
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.set RESET_FS, 0x40 # initial value of "f" segment register
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.set RESET_GS, 0x30 # initial value of "g" segment register
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#define LOAD_SEGMENTS(_value,_segreg) \
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movw $_value##,%ax ; \
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movw %ax,##_segreg
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.global _load_segments
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.global _establish_stack
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_load_segments:
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LOAD_SEGMENTS( RESET_SS, %ss )
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LOAD_SEGMENTS( RESET_DS, %ds )
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LOAD_SEGMENTS( RESET_ES, %es )
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LOAD_SEGMENTS( RESET_FS, %fs )
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LOAD_SEGMENTS( RESET_GS, %gs )
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jmp _establish_stack # return to the bsp entry code
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.global _return_to_monitor
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_return_to_monitor:
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movb $0,%al
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int $0x20 # restart FORCEbug
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jmp start # FORCEbug does not reset PC
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.data
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.global _Do_Load_IDT
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_Do_Load_IDT: .byte 1
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.global _Do_Load_GDT
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_Do_Load_GDT: .byte 0
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