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e59ced2384
No bug. Optimization are 1. change control flow for L(more_2x_vec) to fall through to loop and jump for L(less_4x_vec) and L(less_8x_vec). This uses less code size and saves jumps for length > 4x VEC_SIZE. 2. For EVEX/AVX512 move L(less_vec) closer to entry. 3. Avoid complex address mode for length > 2x VEC_SIZE 4. Slightly better aligning code for the loop from the perspective of code size and uops. 5. Align targets so they make full use of their fetch block and if possible cache line. 6. Try and reduce total number of icache lines that will need to be pulled in for a given length. 7. Include "local" version of stosb target. For AVX2/EVEX/AVX512 jumping to the stosb target in the sse2 code section will almost certainly be to a new page. The new version does increase code size marginally by duplicating the target but should get better iTLB behavior as a result. test-memset, test-wmemset, and test-bzero are all passing. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com> Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
35 lines
675 B
ArmAsm
35 lines
675 B
ArmAsm
#if IS_IN (libc)
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# define USE_WITH_AVX2 1
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# define VEC_SIZE 32
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# define MOV_SIZE 4
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# define RET_SIZE 4
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# define VEC(i) ymm##i
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# define VMOVU vmovdqu
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# define VMOVA vmovdqa
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# define MEMSET_VDUP_TO_VEC0_AND_SET_RETURN(d, r) \
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vmovd d, %xmm0; \
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movq r, %rax; \
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vpbroadcastb %xmm0, %ymm0
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# define WMEMSET_VDUP_TO_VEC0_AND_SET_RETURN(d, r) \
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vmovd d, %xmm0; \
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movq r, %rax; \
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vpbroadcastd %xmm0, %ymm0
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# ifndef SECTION
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# define SECTION(p) p##.avx
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# endif
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# ifndef MEMSET_SYMBOL
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# define MEMSET_SYMBOL(p,s) p##_avx2_##s
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# endif
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# ifndef WMEMSET_SYMBOL
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# define WMEMSET_SYMBOL(p,s) p##_avx2_##s
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# endif
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# include "memset-vec-unaligned-erms.S"
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#endif
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