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e4363cfb57
The function feupdateenv has been fixed to correctly handle FE_DFL_ENV and FE_NOMASK_ENV. The fesetexceptflag function has been fixed to correctly handle setting the new flags instead of just OR-ing the existing flags. This fixes the test-fenv-return and test-fenvinline failures on hppa.
72 lines
2.8 KiB
C
72 lines
2.8 KiB
C
/* FPU control word definitions. HP-PARISC version.
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Copyright (C) 2012-2015 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _FPU_CONTROL_H
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#define _FPU_CONTROL_H
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/* Masking of interrupts. */
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#define _FPU_MASK_PM 0x00000001 /* Inexact (I) */
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#define _FPU_MASK_UM 0x00000002 /* Underflow (U) */
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#define _FPU_MASK_OM 0x00000004 /* Overflow (O) */
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#define _FPU_MASK_ZM 0x00000008 /* Divide by zero (Z) */
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#define _FPU_MASK_IM 0x00000010 /* Invalid operation (V) */
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/* Masking of rounding modes. */
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#define _FPU_HPPA_MASK_RM 0x00000600 /* Rounding mode mask */
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/* Masking of interrupt enable bits. */
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#define _FPU_HPPA_MASK_INT 0x0000001f /* Interrupt mask */
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/* Shift by 27 to install flag bits. */
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#define _FPU_HPPA_SHIFT_FLAGS 27
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/* There are no reserved bits in the PA fpsr (though some are undefined). */
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#define _FPU_RESERVED 0x00000000
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/* Default is: No traps enabled, no flags set, round to nearest. */
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#define _FPU_DEFAULT 0x00000000
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/* Default + exceptions (FE_ALL_EXCEPT) enabled. */
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#define _FPU_IEEE (_FPU_DEFAULT | _FPU_HPPA_MASK_INT)
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/* Type of the control word. */
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typedef unsigned int fpu_control_t;
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/* Macros for accessing the hardware control word. */
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#define _FPU_GETCW(cw) \
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({ \
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union { __extension__ unsigned long long __fpreg; unsigned int __halfreg[2]; } __fullfp; \
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/* Get the current status word. */ \
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__asm__ ("fstd %%fr0,0(%1)\n\t" \
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"fldd 0(%1),%%fr0\n\t" \
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: "=m" (__fullfp.__fpreg) : "r" (&__fullfp.__fpreg) : "%r0"); \
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cw = __fullfp.__halfreg[0]; \
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})
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#define _FPU_SETCW(cw) \
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({ \
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union { __extension__ unsigned long long __fpreg; unsigned int __halfreg[2]; } __fullfp; \
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/* Get the current status word and set the control word. */ \
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__asm__ ("fstd %%fr0,0(%1)\n\t" \
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: "=m" (__fullfp.__fpreg) : "r" (&__fullfp.__fpreg) : "%r0"); \
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__fullfp.__halfreg[0] = cw; \
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__asm__ ("fldd 0(%1),%%fr0\n\t" \
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: : "m" (__fullfp.__fpreg), "r" (&__fullfp.__fpreg) : "%r0" ); \
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})
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/* Default control word set at startup. */
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extern fpu_control_t __fpu_control;
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#endif /* _FPU_CONTROL_H */
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