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aa1142c593
Continuing the preparation for additional _FloatN / _FloatNx function aliases, this patch makes ia64 libm function implementations use libm_alias_float to define function aliases. The same approach is followed as with the corresponding long double and double patches: the ia64-specific macros are left unchanged, with calls to libm_alias_float_other being added in most cases and libm_alias_float itself being used in only a few places. Tested with build-many-glibcs.py for ia64-linux-gnu that installed stripped shared libraries are unchanged by the patch. * sysdeps/ia64/fpu/libm-symbols.h: Include <libm-alias-float.h>. * sysdeps/ia64/fpu/e_acosf.S (acosf): Use libm_alias_float_other. * sysdeps/ia64/fpu/e_acoshf.S (acoshf): Likewise. * sysdeps/ia64/fpu/e_asinf.S (asinf): Likewise. * sysdeps/ia64/fpu/e_atan2f.S (atan2f): Likewise. * sysdeps/ia64/fpu/e_atanhf.S (atanhf): Likewise. * sysdeps/ia64/fpu/e_coshf.S (coshf): Likewise. * sysdeps/ia64/fpu/e_exp10f.S (exp10f): Likewise. * sysdeps/ia64/fpu/e_exp2f.S (exp2f): Likewise. * sysdeps/ia64/fpu/e_expf.S (expf): Likewise. * sysdeps/ia64/fpu/e_fmodf.S (fmodf): Likewise. * sysdeps/ia64/fpu/e_hypotf.S (hypotf): Likewise. * sysdeps/ia64/fpu/e_lgammaf_r.c (lgammaf_r): Define using libm_alias_float_r. * sysdeps/ia64/fpu/e_log2f.S (log2f): Use libm_alias_float_other. * sysdeps/ia64/fpu/e_logf.S (log10f): Likewise. (logf): Likewise. * sysdeps/ia64/fpu/e_powf.S (powf): Likewise. * sysdeps/ia64/fpu/e_remainderf.S (remainderf): Likewise. * sysdeps/ia64/fpu/e_sinhf.S (sinhf): Likewise. * sysdeps/ia64/fpu/e_sqrtf.S (sqrtf): Likewise. * sysdeps/ia64/fpu/libm_sincosf.S (sincosf): Likewise. * sysdeps/ia64/fpu/s_asinhf.S (asinhf): Likewise. * sysdeps/ia64/fpu/s_atanf.S (atanf): Likewise. * sysdeps/ia64/fpu/s_cbrtf.S (cbrtf): Likewise. * sysdeps/ia64/fpu/s_ceilf.S (ceilf): Likewise. * sysdeps/ia64/fpu/s_copysign.S (copysignf): Define using libm_alias_float. * sysdeps/ia64/fpu/s_cosf.S (sinf): Use libm_alias_float_other. (cosf): Likewise. * sysdeps/ia64/fpu/s_erfcf.S (erfcf): Likewise. * sysdeps/ia64/fpu/s_erff.S (erff): Likewise. * sysdeps/ia64/fpu/s_expm1f.S (expm1f): Likewise. * sysdeps/ia64/fpu/s_fabsf.S (fabsf): Likewise. * sysdeps/ia64/fpu/s_fdimf.S (fdimf): Likewise. * sysdeps/ia64/fpu/s_floorf.S (floorf): Likewise. * sysdeps/ia64/fpu/s_fmaf.S (fmaf): Likewise. * sysdeps/ia64/fpu/s_fmaxf.S (fmaxf): Likewise. * sysdeps/ia64/fpu/s_frexpf.c (frexpf): Likewise. * sysdeps/ia64/fpu/s_ldexpf.c (ldexpf): Likewise. * sysdeps/ia64/fpu/s_log1pf.S (log1pf): Likewise. * sysdeps/ia64/fpu/s_logbf.S (logbf): Likewise. * sysdeps/ia64/fpu/s_modff.S (modff): Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S (nearbyintf): Likewise. * sysdeps/ia64/fpu/s_nextafterf.S (nextafterf): Likewise. * sysdeps/ia64/fpu/s_rintf.S (rintf): Likewise. * sysdeps/ia64/fpu/s_roundf.S (roundf): Likewise. * sysdeps/ia64/fpu/s_scalblnf.c (scalblnf): Likewise. * sysdeps/ia64/fpu/s_scalbnf.c (scalbnf): Define using libm_alias_float. * sysdeps/ia64/fpu/s_tanf.S (tanf): Use libm_alias_float_other. * sysdeps/ia64/fpu/s_tanhf.S (tanhf): Likewise. * sysdeps/ia64/fpu/s_truncf.S (truncf): Likewise. * sysdeps/ia64/fpu/w_lgammaf_main.c [BUILD_LGAMMA && !USE_AS_COMPAT] (lgammaf): Likewise. * sysdeps/ia64/fpu/w_tgammaf_compat.S (tgammaf): Likewise.
557 lines
15 KiB
ArmAsm
557 lines
15 KiB
ArmAsm
.file "atanf.s"
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// Copyright (c) 2000 - 2003, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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// History
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//==============================================================
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// 02/20/00 Initial version
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// 08/17/00 Changed predicate register macro-usage to direct predicate
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// names due to an assembler bug.
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// 02/06/02 Corrected .section statement
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// 05/20/02 Cleaned up namespace and sf0 syntax
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// 02/06/03 Reordered header: .section, .global, .proc, .align;
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// added missing bundling
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//
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// Assembly macros
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//==============================================================
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// integer registers used
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EXP_Addr1 = r33
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EXP_Addr2 = r34
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// floating point registers used
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atanf_coeff_R4 = f32
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atanf_coeff_R5 = f33
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atanf_coeff_R1 = f34
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atanf_coeff_R2 = f35
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atanf_coeff_R3 = f36
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atanf_coeff_P1 = f37
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atanf_coeff_Q6 = f38
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atanf_coeff_Q7 = f39
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atanf_coeff_Q8 = f40
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atanf_coeff_Q9 = f41
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atanf_coeff_Q4 = f42
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atanf_coeff_Q5 = f43
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atanf_coeff_Q2 = f44
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atanf_coeff_Q3 = f45
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atanf_coeff_P5 = f46
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atanf_coeff_P6 = f47
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atanf_coeff_Q0 = f48
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atanf_coeff_Q1 = f49
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atanf_coeff_P7 = f50
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atanf_coeff_P8 = f51
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atanf_coeff_P3 = f52
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atanf_coeff_P4 = f53
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atanf_coeff_P9 = f54
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atanf_coeff_P10 = f55
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atanf_coeff_P2 = f56
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atanf_piby2 = f57
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atanf_z = f58
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atanf_b = f59
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atanf_zsq = f60
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atanf_sgn_x = f61
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atanf_sgnx_piby2 = f62
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atanf_abs_x = f63
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atanf_t = f64
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atanf_xcub = f65
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atanf_tsq = f66
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atanf_t4 = f67
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atanf_x5 = f68
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atanf_x6 = f69
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atanf_x11 = f70
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atanf_poly_p1 = f71
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atanf_poly_p2 = f72
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atanf_poly_p3 = f73
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atanf_poly_p4 = f74
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atanf_poly_p5 = f75
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atanf_poly_q1 = f76
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atanf_poly_q2 = f77
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atanf_poly_q3 = f78
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atanf_poly_q4 = f79
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atanf_poly_q5 = f80
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atanf_poly_q = f81
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atanf_poly_r1 = f81
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atanf_poly_r2 = f82
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atanf_poly_r3 = f83
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atanf_bsq = f84
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atanf_z4 = f85
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atanf_z5 = f86
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atanf_z8 = f87
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atanf_z13 = f88
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atanf_poly_r2 = f89
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atanf_poly_r1 = f90
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atanf_z8_bsq = f91
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atanf_poly_r = f92
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atanf_z21_poly_r = f93
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atanf_answer = f8
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// predicate registers used
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//atanf_pred_LE1 = p6
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//atanf_pred_GT1 = p7
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RODATA
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.align 16
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LOCAL_OBJECT_START(atanf_coeff_1_table)
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data8 0x40c4c241be751ff2 // r4
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data8 0x40e9f300c2f3070b // r5
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data8 0x409babffef772075 // r3
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data8 0xbfd5555512191621 // p1
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data8 0x3fc9997e7afbff4e // p2 = q8
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data8 0xbfd5555512191621 // p1 = q9
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data8 0x3f97105b4160f86b // p8 = q2
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data8 0xbfa6e10ba401393f // p7 = q3
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data8 0x3f522e5d33bc9baa // p10 = q0
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data8 0xbf7deaadaa336451 // p9 = q1
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data8 0xbfc2473c5145ee38 // p3
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data8 0x3fbc4f512b1865f5 // p4
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data8 0x3fc9997e7afbff4e // p2
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data8 0x3ff921fb54442d18 // pi/2
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LOCAL_OBJECT_END(atanf_coeff_1_table)
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LOCAL_OBJECT_START(atanf_coeff_2_table)
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data8 0x4035000000004284 // r1
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data8 0x406cdffff336a59b // r2
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data8 0x3fbc4f512b1865f5 // p4 = q6
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data8 0xbfc2473c5145ee38 // p3 = q7
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data8 0x3fb142a73d7c54e3 // p6 = q4
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data8 0xbfb68eed6a8cfa32 // p5 = q5
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data8 0xbfb68eed6a8cfa32 // p5
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data8 0x3fb142a73d7c54e3 // p6
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data8 0xbfa6e10ba401393f // p7
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data8 0x3f97105b4160f86b // p8
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data8 0xbf7deaadaa336451 // p9
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data8 0x3f522e5d33bc9baa // p10
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LOCAL_OBJECT_END(atanf_coeff_2_table)
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.section .text
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GLOBAL_LIBM_ENTRY(atanf)
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{ .mfi
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alloc r32 = ar.pfs,1,2,0,0
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frcpa.s1 atanf_z,p0 = f1,f8
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addl EXP_Addr2 = @ltoff(atanf_coeff_2_table),gp
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}
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{ .mfi
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addl EXP_Addr1 = @ltoff(atanf_coeff_1_table),gp
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fma.s1 atanf_t = f8,f8,f0
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fmerge.s atanf_sgn_x = f8,f1
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nop.i 999;;
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}
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{ .mfi
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ld8 EXP_Addr1 = [EXP_Addr1]
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fmerge.s atanf_abs_x = f1,f8
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nop.i 999
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}
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{ .mfi
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ld8 EXP_Addr2 = [EXP_Addr2]
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nop.f 999
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fclass.m p8,p0 = f8,0x7 // @zero
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fcmp.eq.unc.s0 p9,p10 = f8,f1
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nop.i 999;;
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}
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{ .mfi
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ldfpd atanf_coeff_R4,atanf_coeff_R5 = [EXP_Addr1],16
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fnma.s1 atanf_b = f8,atanf_z,f1
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nop.i 999
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}
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{ .mfi
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ldfpd atanf_coeff_R1,atanf_coeff_R2 = [EXP_Addr2],16
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fma.s1 atanf_zsq = atanf_z,atanf_z,f0
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nop.i 999;;
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}
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{ .mfi
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ldfpd atanf_coeff_R3,atanf_coeff_P1 = [EXP_Addr1],16
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fma.s1 atanf_xcub = f8,atanf_t,f0
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nop.i 999
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}
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{ .mfi
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ldfpd atanf_coeff_Q6,atanf_coeff_Q7 = [EXP_Addr2],16
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fma.s1 atanf_tsq = atanf_t,atanf_t,f0
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nop.i 999;;
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}
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{ .mfi
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ldfpd atanf_coeff_Q8,atanf_coeff_Q9 = [EXP_Addr1],16
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// fcmp.le.s1 atanf_pred_LE1,atanf_pred_GT1 = atanf_abs_x,f1
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fcmp.le.s1 p6,p7 = atanf_abs_x,f1
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nop.i 999
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}
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{ .mfi
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ldfpd atanf_coeff_Q4,atanf_coeff_Q5 = [EXP_Addr2],16
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nop.f 999
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nop.i 999;;
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}
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{ .mfi
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ldfpd atanf_coeff_Q2,atanf_coeff_Q3 = [EXP_Addr1],16
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fclass.m p8,p0 = f8,0xe7 // @inf|@qnan|@snan|@zero
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nop.i 999
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}
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{ .mfi
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ldfpd atanf_coeff_P5,atanf_coeff_P6 = [EXP_Addr2],16
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nop.f 999
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nop.i 999;;
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}
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{ .mfi
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ldfpd atanf_coeff_Q0,atanf_coeff_Q1 = [EXP_Addr1],16
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nop.f 999
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nop.i 999
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}
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{ .mfi
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ldfpd atanf_coeff_P7,atanf_coeff_P8 = [EXP_Addr2],16
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nop.f 999
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nop.i 999;;
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}
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{ .mfi
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ldfpd atanf_coeff_P3,atanf_coeff_P4 = [EXP_Addr1],16
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fma.s1 atanf_bsq = atanf_b,atanf_b,f0
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nop.i 999
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}
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{ .mfi
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ldfpd atanf_coeff_P9,atanf_coeff_P10 = [EXP_Addr2]
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fma.s1 atanf_z4 = atanf_zsq,atanf_zsq,f0
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nop.i 999;;
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}
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{ .mfi
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ldfpd atanf_coeff_P2,atanf_piby2 = [EXP_Addr1]
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fma.s1 atanf_x6 = atanf_t,atanf_tsq,f0
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_t4 = atanf_tsq,atanf_tsq,f0
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nop.i 999;;
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}
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{ .mfb
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nop.m 999
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fma.s1 atanf_x5 = atanf_t,atanf_xcub,f0
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(p8) br.cond.spnt ATANF_X_INF_NAN_ZERO
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}
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;;
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_r1 = atanf_b,atanf_coeff_R1,f1
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_r3 = atanf_b,atanf_coeff_R5,atanf_coeff_R4
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_r2 = atanf_b,atanf_coeff_R3,atanf_coeff_R2
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_z8 = atanf_z4,atanf_z4,f0
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_q2 = atanf_t,atanf_coeff_Q5,atanf_coeff_Q4
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_q3 = atanf_t,atanf_coeff_Q7,atanf_coeff_Q6
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_z5 = atanf_z,atanf_z4,f0
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_q1 = atanf_t,atanf_coeff_Q9,atanf_coeff_Q8
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_q4 = atanf_t,atanf_coeff_Q1,atanf_coeff_Q0
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_q5 = atanf_t,atanf_coeff_Q3,atanf_coeff_Q2
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_p4 = f8,atanf_coeff_P1,f0
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_p5 = atanf_t,atanf_coeff_P4,atanf_coeff_P3
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_r1 = atanf_z8,atanf_poly_r1,f0
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_z8_bsq = atanf_z8,atanf_bsq,f0
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nop.i 999;;
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}
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{ .mfi
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nop.m 999
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fma.s1 atanf_poly_q2 = atanf_tsq,atanf_poly_q3,atanf_poly_q2
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nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_r2 = atanf_bsq,atanf_poly_r3,atanf_poly_r2
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p2 = atanf_t,atanf_coeff_P8,atanf_coeff_P7
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q1 = atanf_poly_q1,f1,atanf_tsq
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_z13 = atanf_z5,atanf_z8,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p1 = atanf_t,atanf_coeff_P10,atanf_coeff_P9
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p4 = atanf_t,atanf_poly_p4,f8
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q4 = atanf_tsq,atanf_poly_q5,atanf_poly_q4
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p3 = atanf_t,atanf_coeff_P6,atanf_coeff_P5
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p5 = atanf_t,atanf_poly_p5,atanf_coeff_P2
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_x11 = atanf_x5,atanf_x6,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_r = atanf_z8_bsq,atanf_poly_r2,atanf_poly_r1
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s0 atanf_sgnx_piby2 = atanf_sgn_x,atanf_piby2,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q2 = atanf_t4,atanf_poly_q1,atanf_poly_q2
|
|
nop.i 999;;
|
|
}
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p1 = atanf_tsq,atanf_poly_p1,atanf_poly_p2
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p4 = atanf_x5,atanf_poly_p5,atanf_poly_p4
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_z21_poly_r = atanf_z13,atanf_poly_r,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_q = atanf_t4,atanf_poly_q2,atanf_poly_q4
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 atanf_poly_p1 = atanf_tsq,atanf_poly_p1,atanf_poly_p3
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
//(atanf_pred_GT1) fnma.s atanf_answer = atanf_poly_q,atanf_z21_poly_r,atanf_sgnx_piby2
|
|
(p7) fnma.s.s0 atanf_answer = atanf_poly_q,atanf_z21_poly_r,atanf_sgnx_piby2
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
//(atanf_pred_LE1) fma.s atanf_answer = atanf_x11,atanf_poly_p1,atanf_poly_p4
|
|
(p6) fma.s.s0 atanf_answer = atanf_x11,atanf_poly_p1,atanf_poly_p4
|
|
br.ret.sptk b0
|
|
}
|
|
|
|
|
|
|
|
ATANF_X_INF_NAN_ZERO:
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fclass.m p8,p9 = f8,0x23 // @inf
|
|
nop.i 0
|
|
}
|
|
;;
|
|
{ .mfi
|
|
nop.m 0
|
|
(p8) fmerge.s f8 = f8, atanf_piby2
|
|
nop.i 0
|
|
}
|
|
;;
|
|
{ .mfb
|
|
nop.m 0
|
|
fnorm.s.s0 f8 = f8
|
|
br.ret.sptk b0
|
|
}
|
|
;;
|
|
|
|
GLOBAL_LIBM_END(atanf)
|
|
libm_alias_float_other (atan, atan)
|