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d5b411854f
A number of functions in the sysdeps/powerpc/powerpc64/ tree don't use or change r2, yet declare a global entry that sets up r2. This patch fixes that problem, and consolidates the ENTRY and EALIGN macros. * sysdeps/powerpc/powerpc64/sysdep.h: Formatting. (NOPS, ENTRY_3): New macros. (ENTRY): Rewrite. (ENTRY_TOCLESS): Define. (EALIGN, EALIGN_W_0, EALIGN_W_1, EALIGN_W_2, EALIGN_W_4, EALIGN_W_5, EALIGN_W_6, EALIGN_W_7, EALIGN_W_8): Delete. * sysdeps/powerpc/powerpc64/a2/memcpy.S: Replace EALIGN with ENTRY. * sysdeps/powerpc/powerpc64/dl-trampoline.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strstr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcasestr.S: Likewise. * sysdeps/powerpc/powerpc64/addmul_1.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/powerpc64/cell/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_fabsl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc64/lshift.S: Likewise. * sysdeps/powerpc/powerpc64/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/mul_1.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power7/add_n.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memmove.S: Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcasecmp.S (strcasecmp_l): Likewise. * sysdeps/powerpc/powerpc64/power7/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strchrnul.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strspn.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/ppc-mcount.S: Store LR earlier. Don't add nop when SHARED. * sysdeps/powerpc/powerpc64/start.S: Fix comment. * sysdeps/powerpc/powerpc64/multiarch/strrchr-power8.S (ENTRY): Don't define. (ENTRY_TOCLESS): Define. * sysdeps/powerpc/powerpc32/sysdep.h (ENTRY_TOCLESS): Define. * sysdeps/powerpc/fpu/s_fma.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/fpu/s_fmaf.S: Likewise.
231 lines
6.3 KiB
ArmAsm
231 lines
6.3 KiB
ArmAsm
/* Optimized strchr implementation for PowerPC64/POWER7 using cmpb insn.
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Copyright (C) 2010-2017 Free Software Foundation, Inc.
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Contributed by Luis Machado <luisgpm@br.ibm.com>.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#ifndef STRCHR
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# define STRCHR strchr
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#endif
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/* int [r3] strchr (char *s [r3], int c [r4]) */
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.machine power7
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ENTRY_TOCLESS (STRCHR)
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CALL_MCOUNT 2
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dcbt 0,r3
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clrrdi r8,r3,3 /* Align the address to doubleword boundary. */
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cmpdi cr7,r4,0
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ld r12,0(r8) /* Load doubleword from memory. */
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li r0,0 /* Doubleword with null chars to use
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with cmpb. */
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rlwinm r6,r3,3,26,28 /* Calculate padding. */
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beq cr7,L(null_match)
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/* Replicate byte to doubleword. */
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insrdi r4,r4,8,48
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insrdi r4,r4,16,32
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insrdi r4,r4,32,0
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/* Now r4 has a doubleword of c bytes and r0 has
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a doubleword of null bytes. */
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cmpb r10,r12,r4 /* Compare each byte against c byte. */
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cmpb r11,r12,r0 /* Compare each byte against null byte. */
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/* Move the doublewords left and right to discard the bits that are
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not part of the string and bring them back as zeros. */
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#ifdef __LITTLE_ENDIAN__
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srd r10,r10,r6
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srd r11,r11,r6
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sld r10,r10,r6
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sld r11,r11,r6
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#else
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sld r10,r10,r6
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sld r11,r11,r6
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srd r10,r10,r6
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srd r11,r11,r6
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#endif
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or r5,r10,r11 /* OR the results to speed things up. */
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cmpdi cr7,r5,0 /* If r5 == 0, no c or null bytes
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have been found. */
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bne cr7,L(done)
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mtcrf 0x01,r8
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/* Are we now aligned to a doubleword boundary? If so, skip to
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the main loop. Otherwise, go through the alignment code. */
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bt 28,L(loop)
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/* Handle WORD2 of pair. */
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ldu r12,8(r8)
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cmpb r10,r12,r4
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cmpb r11,r12,r0
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or r5,r10,r11
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cmpdi cr7,r5,0
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bne cr7,L(done)
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b L(loop) /* We branch here (rather than falling through)
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to skip the nops due to heavy alignment
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of the loop below. */
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.p2align 5
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L(loop):
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/* Load two doublewords, compare and merge in a
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single register for speed. This is an attempt
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to speed up the null-checking process for bigger strings. */
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ld r12,8(r8)
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ldu r9,16(r8)
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cmpb r10,r12,r4
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cmpb r11,r12,r0
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cmpb r6,r9,r4
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cmpb r7,r9,r0
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or r12,r10,r11
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or r9,r6,r7
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or r5,r12,r9
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cmpdi cr7,r5,0
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beq cr7,L(loop)
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/* OK, one (or both) of the doublewords contains a c/null byte. Check
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the first doubleword and decrement the address in case the first
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doubleword really contains a c/null byte. */
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cmpdi cr6,r12,0
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addi r8,r8,-8
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bne cr6,L(done)
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/* The c/null byte must be in the second doubleword. Adjust the
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address again and move the result of cmpb to r10 so we can calculate
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the pointer. */
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mr r10,r6
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mr r11,r7
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addi r8,r8,8
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/* r10/r11 have the output of the cmpb instructions, that is,
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0xff in the same position as the c/null byte in the original
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doubleword from the string. Use that to calculate the pointer. */
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L(done):
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#ifdef __LITTLE_ENDIAN__
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addi r3,r10,-1
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andc r3,r3,r10
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popcntd r0,r3
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addi r4,r11,-1
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andc r4,r4,r11
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cmpld cr7,r3,r4
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bgt cr7,L(no_match)
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#else
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cntlzd r0,r10 /* Count leading zeros before c matches. */
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cmpld cr7,r11,r10
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bgt cr7,L(no_match)
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#endif
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srdi r0,r0,3 /* Convert leading zeros to bytes. */
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add r3,r8,r0 /* Return address of the matching c byte
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or null in case c was not found. */
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blr
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.align 4
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L(no_match):
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li r3,0
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blr
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/* We are here because strchr was called with a null byte. */
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.align 4
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L(null_match):
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/* r0 has a doubleword of null bytes. */
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cmpb r5,r12,r0 /* Compare each byte against null bytes. */
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/* Move the doublewords left and right to discard the bits that are
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not part of the string and bring them back as zeros. */
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#ifdef __LITTLE_ENDIAN__
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srd r5,r5,r6
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sld r5,r5,r6
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#else
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sld r5,r5,r6
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srd r5,r5,r6
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#endif
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cmpdi cr7,r5,0 /* If r10 == 0, no c or null bytes
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have been found. */
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bne cr7,L(done_null)
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mtcrf 0x01,r8
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/* Are we now aligned to a quadword boundary? If so, skip to
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the main loop. Otherwise, go through the alignment code. */
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bt 28,L(loop_null)
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/* Handle WORD2 of pair. */
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ldu r12,8(r8)
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cmpb r5,r12,r0
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cmpdi cr7,r5,0
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bne cr7,L(done_null)
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b L(loop_null) /* We branch here (rather than falling through)
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to skip the nops due to heavy alignment
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of the loop below. */
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/* Main loop to look for the end of the string. Since it's a
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small loop (< 8 instructions), align it to 32-bytes. */
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.p2align 5
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L(loop_null):
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/* Load two doublewords, compare and merge in a
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single register for speed. This is an attempt
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to speed up the null-checking process for bigger strings. */
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ld r12,8(r8)
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ldu r11,16(r8)
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cmpb r5,r12,r0
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cmpb r10,r11,r0
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or r6,r5,r10
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cmpdi cr7,r6,0
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beq cr7,L(loop_null)
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/* OK, one (or both) of the doublewords contains a null byte. Check
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the first doubleword and decrement the address in case the first
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doubleword really contains a null byte. */
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cmpdi cr6,r5,0
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addi r8,r8,-8
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bne cr6,L(done_null)
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/* The null byte must be in the second doubleword. Adjust the address
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again and move the result of cmpb to r10 so we can calculate the
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pointer. */
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mr r5,r10
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addi r8,r8,8
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/* r5 has the output of the cmpb instruction, that is, it contains
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0xff in the same position as the null byte in the original
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doubleword from the string. Use that to calculate the pointer. */
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L(done_null):
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#ifdef __LITTLE_ENDIAN__
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addi r0,r5,-1
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andc r0,r0,r5
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popcntd r0,r0
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#else
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cntlzd r0,r5 /* Count leading zeros before the match. */
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#endif
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srdi r0,r0,3 /* Convert leading zeros to bytes. */
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add r3,r8,r0 /* Return address of the matching null byte. */
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blr
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END (STRCHR)
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weak_alias (strchr, index)
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libc_hidden_builtin_def (strchr)
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