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On s390, the DXC(data-exception-code)-byte in FPC(floating-point-control)-
register contains a code of the last occured exception.
If bits 6 and 7 of DXC-byte are zero, the bits 0-5 correspond to the
ieee-exception flag bits.
The current implementation always uses these bits as ieee-exception flag bits.
fetestexcept() reports any exception after the first usage of a
vector-instruction in a process, because it raises an "vector instruction
exception" with DXC-code 0xFE.
This patch fixes the handling of the DXC-byte. The DXC-Byte is only handled
if bits 6 and 7 are zero.
The #define _FPU_RESERVED is extended by the DXC-Byte.
Otherwise the tests math/test-fpucw-static and math/test-fpucw-ieee-static
fails, because DXC-Byte contains the vector instruction exception when reaching
main(). This exception was triggered by strrchr() call in __init_misc().
__init_misc() is called after __setfpucw () in __libc_init_first().
The field __ieee_instruction_pointer in struct fenv_t is renamed to __unused
because it is a relict from commit "Remove PTRACE_PEEKUSER"
(87b9b50f0d) and isn´t used anymore.
ChangeLog:
[BZ #18610]
* sysdeps/s390/fpu/bits/fenv.h (fenv_t): Rename
__ieee_instruction_pointer to __unused.
* sysdeps/s390/fpu/fesetenv.c (__fesetenv): Remove usage of
__ieee_instruction_pointer.
* sysdeps/s390/fpu/fclrexcpt.c (feclearexcept): Fix dxc-field handling.
* sysdeps/s390/fpu/fgetexcptflg.c (fegetexceptflag): Likewise.
* sysdeps/s390/fpu/fsetexcptflg.c (fesetexceptflag): Likewise.
* sysdeps/s390/fpu/ftestexcept.c (fetestexcept): Likewise.
* sysdeps/s390/fpu/fpu_control.h (_FPU_RESERVED):
Mark dxc-field as reserved.
55 lines
2.0 KiB
C
55 lines
2.0 KiB
C
/* Set floating-point environment exception handling.
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Copyright (C) 2000-2015 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Denis Joseph Barrow (djbarrow@de.ibm.com).
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <fenv_libc.h>
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#include <math.h>
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#include <fpu_control.h>
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int
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fesetexceptflag (const fexcept_t *flagp, int excepts)
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{
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fexcept_t temp, newexcepts;
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/* Get the current environment. We have to do this since we cannot
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separately set the status word. */
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_FPU_GETCW (temp);
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/* Install the new exception bits in the Accrued Exception Byte. */
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excepts = excepts & FE_ALL_EXCEPT;
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newexcepts = excepts << FPC_FLAGS_SHIFT;
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temp &= ~newexcepts;
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if ((temp & FPC_NOT_FPU_EXCEPTION) == 0)
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/* Bits 6, 7 of dxc-byte are zero,
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thus bits 0-5 of dxc-byte correspond to the flag-bits.
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Clear given exceptions in dxc-field. */
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temp &= ~(excepts << FPC_DXC_SHIFT);
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/* Integrate dxc-byte of flagp into flags. The dxc-byte of flagp contains
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either an ieee-exception or 0 (see fegetexceptflag). */
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temp |= (*flagp | ((*flagp >> FPC_DXC_SHIFT) << FPC_FLAGS_SHIFT))
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& newexcepts;
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/* Store the new status word (along with the rest of the environment.
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Possibly new exceptions are set but they won't get executed unless
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the next floating-point instruction. */
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_FPU_SETCW (temp);
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/* Success. */
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return 0;
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}
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