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74bc0c3a16
As noted in the bug, the asm operands need to be copied to register variables to avoid operand reloads in the principal asm of the macro. See the arm implementation for reference. Otherwise we get: ../sysdeps/unix/sysv/linux/hppa/bits/atomic.h:68:6: error: can't find a register in class 'R1_REGS' while reloading 'asm' Build tested on trunk with gcc-4.8. Similar patch has been tested with 2.19 on Debian hppa-unknown-linux-gnu.
110 lines
3.6 KiB
C
110 lines
3.6 KiB
C
/* Copyright (C) 2003-2015 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Carlos O'Donell <carlos@baldric.uwo.ca>, 2005.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <stdint.h> /* Required for type definitions e.g. uint8_t. */
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#include <abort-instr.h> /* Required for ABORT_INSTRUCTIUON. */
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#include <kernel-features.h> /* Required for __ASSUME_LWS_CAS. */
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/* We need EFAULT, ENONSYS */
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#if !defined EFAULT && !defined ENOSYS
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#define EFAULT 14
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#define ENOSYS 251
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#endif
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#ifndef _BITS_ATOMIC_H
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#define _BITS_ATOMIC_H 1
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typedef int8_t atomic8_t;
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typedef uint8_t uatomic8_t;
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typedef int_fast8_t atomic_fast8_t;
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typedef uint_fast8_t uatomic_fast8_t;
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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#define __HAVE_64B_ATOMICS 0
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#define USE_ATOMIC_COMPILER_BUILTINS 0
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/* prev = *addr;
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if (prev == old)
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*addr = new;
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return prev; */
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/* Use the kernel atomic light weight syscalls on hppa. */
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#define _LWS "0xb0"
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#define _LWS_CAS "0"
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/* Note r31 is the link register. */
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#define _LWS_CLOBBER "r1", "r23", "r22", "r20", "r31", "memory"
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/* String constant for -EAGAIN. */
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#define _ASM_EAGAIN "-11"
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/* String constant for -EDEADLOCK. */
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#define _ASM_EDEADLOCK "-45"
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#if __ASSUME_LWS_CAS
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/* The only basic operation needed is compare and exchange. The mem
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pointer must be word aligned. */
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# define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
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({ \
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register long lws_errno asm("r21"); \
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register unsigned long lws_ret asm("r28"); \
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register unsigned long lws_mem asm("r26") = (unsigned long)(mem); \
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register unsigned long lws_old asm("r25") = (unsigned long)(oldval);\
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register unsigned long lws_new asm("r24") = (unsigned long)(newval);\
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__asm__ __volatile__( \
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"0: \n\t" \
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"ble " _LWS "(%%sr2, %%r0) \n\t" \
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"ldi " _LWS_CAS ", %%r20 \n\t" \
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"ldi " _ASM_EAGAIN ", %%r20 \n\t" \
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"cmpb,=,n %%r20, %%r21, 0b \n\t" \
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"nop \n\t" \
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"ldi " _ASM_EDEADLOCK ", %%r20 \n\t" \
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"cmpb,=,n %%r20, %%r21, 0b \n\t" \
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"nop \n\t" \
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: "=r" (lws_ret), "=r" (lws_errno) \
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: "r" (lws_mem), "r" (lws_old), "r" (lws_new) \
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: _LWS_CLOBBER \
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); \
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\
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if (lws_errno == -EFAULT || lws_errno == -ENOSYS) \
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ABORT_INSTRUCTION; \
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\
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(__typeof (oldval)) lws_ret; \
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})
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# define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
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({ \
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__typeof__ (*mem) ret; \
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ret = atomic_compare_and_exchange_val_acq(mem, newval, oldval); \
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/* Return 1 if it was already acquired. */ \
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(ret != oldval); \
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})
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#else
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# error __ASSUME_LWS_CAS is required to build glibc.
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#endif
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/* __ASSUME_LWS_CAS */
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#endif
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/* _BITS_ATOMIC_H */
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