mirror of
https://sourceware.org/git/glibc.git
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b79f8ff26a
Optimizations are:
1. Use the fact that bsf(0) leaves the destination unchanged to save a
branch in short string case.
2. Restructure code so that small strings are given the hot path.
- This is a net-zero on the benchmark suite but in general makes
sense as smaller sizes are far more common.
3. Use more code-size efficient instructions.
- tzcnt ... -> bsf ...
- vpcmpb $0 ... -> vpcmpeq ...
4. Align labels less aggressively, especially if it doesn't save fetch
blocks / causes the basic-block to span extra cache-lines.
The optimizations (especially for point 2) make the strnlen and
strlen code essentially incompatible so split strnlen-evex
to a new file.
Code Size Changes:
strlen-evex.S : -23 bytes
strnlen-evex.S : -167 bytes
Net perf changes:
Reported as geometric mean of all improvements / regressions from N=10
runs of the benchtests. Value as New Time / Old Time so < 1.0 is
improvement and 1.0 is regression.
strlen-evex.S : 0.992 (No real change)
strnlen-evex.S : 0.947
Full results attached in email.
Full check passes on x86-64.
424 lines
9.0 KiB
ArmAsm
424 lines
9.0 KiB
ArmAsm
/* strnlen/wcsnlen optimized with 256-bit EVEX instructions.
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Copyright (C) 2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <isa-level.h>
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#include <sysdep.h>
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#if ISA_SHOULD_BUILD (4)
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# ifndef VEC_SIZE
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# include "x86-evex256-vecs.h"
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# endif
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# ifndef STRNLEN
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# define STRNLEN __strnlen_evex
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# endif
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# ifdef USE_AS_WCSLEN
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# define VPCMPEQ vpcmpeqd
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# define VPCMPNEQ vpcmpneqd
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# define VPTESTN vptestnmd
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# define VPTEST vptestmd
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# define VPMINU vpminud
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# define CHAR_SIZE 4
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# else
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# define VPCMPEQ vpcmpeqb
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# define VPCMPNEQ vpcmpneqb
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# define VPTESTN vptestnmb
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# define VPTEST vptestmb
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# define VPMINU vpminub
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# define CHAR_SIZE 1
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# define REG_WIDTH VEC_SIZE
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# endif
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# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
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# include "reg-macros.h"
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# if CHAR_PER_VEC == 32
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# define SUB_SHORT(imm, reg) subb $(imm), %VGPR_SZ(reg, 8)
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# else
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# define SUB_SHORT(imm, reg) subl $(imm), %VGPR_SZ(reg, 32)
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# endif
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# if CHAR_PER_VEC == 64
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# define FALLTHROUGH_RETURN_OFFSET (CHAR_PER_VEC * 3)
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# else
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# define FALLTHROUGH_RETURN_OFFSET (CHAR_PER_VEC * 2)
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# endif
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# define XZERO VMM_128(0)
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# define VZERO VMM(0)
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# define PAGE_SIZE 4096
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.section SECTION(.text), "ax", @progbits
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ENTRY_P2ALIGN (STRNLEN, 6)
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/* Check zero length. */
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test %RSI_LP, %RSI_LP
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jz L(zero)
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# ifdef __ILP32__
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/* Clear the upper 32 bits. */
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movl %esi, %esi
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# endif
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movl %edi, %eax
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vpxorq %XZERO, %XZERO, %XZERO
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andl $(PAGE_SIZE - 1), %eax
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cmpl $(PAGE_SIZE - VEC_SIZE), %eax
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ja L(cross_page_boundary)
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/* Check the first VEC_SIZE bytes. Each bit in K0 represents a
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null byte. */
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VPCMPEQ (%rdi), %VZERO, %k0
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KMOV %k0, %VRCX
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movq %rsi, %rax
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/* If src (rcx) is zero, bsf does not change the result. NB:
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Must use 64-bit bsf here so that upper bits of len are not
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cleared. */
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bsfq %rcx, %rax
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/* If rax > CHAR_PER_VEC then rcx must have been zero (no null
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CHAR) and rsi must be > CHAR_PER_VEC. */
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cmpq $CHAR_PER_VEC, %rax
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ja L(more_1x_vec)
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/* Check if first match in bounds. */
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cmpq %rax, %rsi
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cmovb %esi, %eax
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ret
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# if CHAR_PER_VEC != 32
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.p2align 4,, 2
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L(zero):
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L(max_0):
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movl %esi, %eax
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ret
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# endif
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/* Aligned more for strnlen compares remaining length vs 2 *
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CHAR_PER_VEC, 4 * CHAR_PER_VEC, and 8 * CHAR_PER_VEC before
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going to the loop. */
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.p2align 4,, 10
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L(more_1x_vec):
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L(cross_page_continue):
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/* Compute number of words checked after aligning. */
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# ifdef USE_AS_WCSLEN
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/* Need to compute directly for wcslen as CHAR_SIZE * rsi can
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overflow. */
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movq %rdi, %rax
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andq $(VEC_SIZE * -1), %rdi
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subq %rdi, %rax
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sarq $2, %rax
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leaq -(CHAR_PER_VEC * 1)(%rax, %rsi), %rax
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# else
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leaq (VEC_SIZE * -1)(%rsi, %rdi), %rax
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andq $(VEC_SIZE * -1), %rdi
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subq %rdi, %rax
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# endif
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VPCMPEQ VEC_SIZE(%rdi), %VZERO, %k0
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cmpq $(CHAR_PER_VEC * 2), %rax
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ja L(more_2x_vec)
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L(last_2x_vec_or_less):
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(last_vec_check)
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/* Check the end of data. */
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SUB_SHORT (CHAR_PER_VEC, rax)
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jbe L(max_0)
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VPCMPEQ (VEC_SIZE * 2)(%rdi), %VZERO, %k0
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jz L(max_0)
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/* Best place for LAST_VEC_CHECK if ZMM. */
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.p2align 4,, 8
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L(last_vec_check):
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bsf %VRDX, %VRDX
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sub %eax, %edx
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lea (%rsi, %rdx), %eax
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cmovae %esi, %eax
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ret
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# if CHAR_PER_VEC == 32
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.p2align 4,, 2
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L(zero):
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L(max_0):
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movl %esi, %eax
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ret
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# endif
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.p2align 4,, 8
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L(last_4x_vec_or_less):
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addl $(CHAR_PER_VEC * -4), %eax
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VPCMPEQ (VEC_SIZE * 5)(%rdi), %VZERO, %k0
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subq $(VEC_SIZE * -4), %rdi
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cmpl $(CHAR_PER_VEC * 2), %eax
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jbe L(last_2x_vec_or_less)
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.p2align 4,, 6
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L(more_2x_vec):
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/* Remaining length >= 2 * CHAR_PER_VEC so do VEC0/VEC1 without
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rechecking bounds. */
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(first_vec_x1)
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VPCMPEQ (VEC_SIZE * 2)(%rdi), %VZERO, %k0
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(first_vec_x2)
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cmpq $(CHAR_PER_VEC * 4), %rax
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ja L(more_4x_vec)
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VPCMPEQ (VEC_SIZE * 3)(%rdi), %VZERO, %k0
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KMOV %k0, %VRDX
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addl $(CHAR_PER_VEC * -2), %eax
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test %VRDX, %VRDX
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jnz L(last_vec_check)
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subl $(CHAR_PER_VEC), %eax
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jbe L(max_1)
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VPCMPEQ (VEC_SIZE * 4)(%rdi), %VZERO, %k0
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(last_vec_check)
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L(max_1):
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movl %esi, %eax
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ret
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.p2align 4,, 3
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L(first_vec_x2):
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# if VEC_SIZE == 64
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/* If VEC_SIZE == 64 we can fit logic for full return label in
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spare bytes before next cache line. */
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bsf %VRDX, %VRDX
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sub %eax, %esi
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leal (CHAR_PER_VEC * 1)(%rsi, %rdx), %eax
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ret
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.p2align 4,, 6
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# else
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addl $CHAR_PER_VEC, %esi
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# endif
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L(first_vec_x1):
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bsf %VRDX, %VRDX
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sub %eax, %esi
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leal (CHAR_PER_VEC * 0)(%rsi, %rdx), %eax
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ret
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.p2align 4,, 6
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L(first_vec_x4):
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# if VEC_SIZE == 64
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/* If VEC_SIZE == 64 we can fit logic for full return label in
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spare bytes before next cache line. */
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bsf %VRDX, %VRDX
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sub %eax, %esi
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leal (CHAR_PER_VEC * 3)(%rsi, %rdx), %eax
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ret
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.p2align 4,, 6
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# else
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addl $CHAR_PER_VEC, %esi
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# endif
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L(first_vec_x3):
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bsf %VRDX, %VRDX
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sub %eax, %esi
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leal (CHAR_PER_VEC * 2)(%rsi, %rdx), %eax
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ret
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.p2align 4,, 5
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L(more_4x_vec):
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VPCMPEQ (VEC_SIZE * 3)(%rdi), %VZERO, %k0
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(first_vec_x3)
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VPCMPEQ (VEC_SIZE * 4)(%rdi), %VZERO, %k0
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(first_vec_x4)
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/* Check if at last VEC_SIZE * 4 length before aligning for the
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loop. */
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cmpq $(CHAR_PER_VEC * 8), %rax
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jbe L(last_4x_vec_or_less)
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/* Compute number of words checked after aligning. */
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# ifdef USE_AS_WCSLEN
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/* Need to compute directly for wcslen as CHAR_SIZE * rsi can
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overflow. */
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leaq (VEC_SIZE * -3)(%rdi), %rdx
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# else
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leaq (VEC_SIZE * -3)(%rdi, %rax), %rax
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# endif
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subq $(VEC_SIZE * -1), %rdi
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/* Align data to VEC_SIZE * 4. */
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# if VEC_SIZE == 64
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/* Saves code size. No evex512 processor has partial register
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stalls. If that change this can be replaced with `andq
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$-(VEC_SIZE * 4), %rdi`. */
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xorb %dil, %dil
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# else
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andq $-(VEC_SIZE * 4), %rdi
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# endif
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# ifdef USE_AS_WCSLEN
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subq %rdi, %rdx
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sarq $2, %rdx
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addq %rdx, %rax
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# else
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subq %rdi, %rax
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# endif
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/* Compare 4 * VEC at a time forward. */
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.p2align 4,, 11
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L(loop_4x_vec):
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VMOVA (VEC_SIZE * 4)(%rdi), %VMM(1)
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VPMINU (VEC_SIZE * 5)(%rdi), %VMM(1), %VMM(2)
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VMOVA (VEC_SIZE * 6)(%rdi), %VMM(3)
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VPMINU (VEC_SIZE * 7)(%rdi), %VMM(3), %VMM(4)
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VPTESTN %VMM(2), %VMM(2), %k0
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VPTESTN %VMM(4), %VMM(4), %k2
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subq $-(VEC_SIZE * 4), %rdi
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/* Break if at end of length. */
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subq $(CHAR_PER_VEC * 4), %rax
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jbe L(loop_len_end)
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KORTEST %k0, %k2
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jz L(loop_4x_vec)
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L(loop_last_4x_vec):
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movq %rsi, %rcx
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subq %rax, %rsi
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VPTESTN %VMM(1), %VMM(1), %k1
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KMOV %k1, %VRDX
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test %VRDX, %VRDX
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jnz L(last_vec_x0)
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(last_vec_x1)
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VPTESTN %VMM(3), %VMM(3), %k0
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/* Seperate logic for VEC_SIZE == 64 and VEC_SIZE == 32 for
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returning last 2x VEC. For VEC_SIZE == 64 we test each VEC
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individually, for VEC_SIZE == 32 we combine them in a single
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64-bit GPR. */
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# if CHAR_PER_VEC == 64
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(last_vec_x2)
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KMOV %k2, %VRDX
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# else
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/* We can only combine last 2x VEC masks if CHAR_PER_VEC <= 32.
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*/
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kmovd %k2, %edx
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kmovd %k0, %eax
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salq $CHAR_PER_VEC, %rdx
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orq %rax, %rdx
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# endif
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/* first_vec_x3 for strlen-ZMM and first_vec_x2 for strlen-YMM.
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*/
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bsfq %rdx, %rdx
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leaq (FALLTHROUGH_RETURN_OFFSET - CHAR_PER_VEC * 4)(%rsi, %rdx), %rax
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cmpq %rax, %rcx
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cmovb %rcx, %rax
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ret
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/* Handle last 4x VEC after loop. All VECs have been loaded. */
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.p2align 4,, 4
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L(loop_len_end):
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KORTEST %k0, %k2
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jnz L(loop_last_4x_vec)
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movq %rsi, %rax
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ret
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# if CHAR_PER_VEC == 64
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/* Since we can't combine the last 2x VEC for VEC_SIZE == 64
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need return label for it. */
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.p2align 4,, 8
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L(last_vec_x2):
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bsf %VRDX, %VRDX
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leaq (CHAR_PER_VEC * -2)(%rsi, %rdx), %rax
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cmpq %rax, %rcx
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cmovb %rcx, %rax
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ret
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# endif
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.p2align 4,, 10
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L(last_vec_x1):
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addq $CHAR_PER_VEC, %rsi
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L(last_vec_x0):
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bsf %VRDX, %VRDX
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leaq (CHAR_PER_VEC * -4)(%rsi, %rdx), %rax
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cmpq %rax, %rcx
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cmovb %rcx, %rax
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ret
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.p2align 4,, 8
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L(cross_page_boundary):
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/* Align data to VEC_SIZE. */
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movq %rdi, %rcx
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andq $-VEC_SIZE, %rcx
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VPCMPEQ (%rcx), %VZERO, %k0
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KMOV %k0, %VRCX
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# ifdef USE_AS_WCSLEN
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shrl $2, %eax
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andl $(CHAR_PER_VEC - 1), %eax
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# endif
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shrx %VRAX, %VRCX, %VRCX
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negl %eax
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andl $(CHAR_PER_VEC - 1), %eax
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movq %rsi, %rdx
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bsf %VRCX, %VRDX
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cmpq %rax, %rdx
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ja L(cross_page_continue)
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movl %edx, %eax
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cmpq %rdx, %rsi
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cmovb %esi, %eax
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ret
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END (STRNLEN)
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#endif
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