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We stopped adding "Contributed by" or similar lines in sources in 2012 in favour of git logs and keeping the Contributors section of the glibc manual up to date. Removing these lines makes the license header a bit more consistent across files and also removes the possibility of error in attribution when license blocks or files are copied across since the contributed-by lines don't actually reflect reality in those cases. Move all "Contributed by" and similar lines (Written by, Test by, etc.) into a new file CONTRIBUTED-BY to retain record of these contributions. These contributors are also mentioned in manual/contrib.texi, so we just maintain this additional record as a courtesy to the earlier developers. The following scripts were used to filter a list of files to edit in place and to clean up the CONTRIBUTED-BY file respectively. These were not added to the glibc sources because they're not expected to be of any use in future given that this is a one time task: https://gist.github.com/siddhesh/b5ecac94eabfd72ed2916d6d8157e7dc https://gist.github.com/siddhesh/15ea1f5e435ace9774f485030695ee02 Reviewed-by: Carlos O'Donell <carlos@redhat.com>
334 lines
12 KiB
C
334 lines
12 KiB
C
/* Atomic operations. PowerPC Common version.
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Copyright (C) 2003-2021 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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/*
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* Never include sysdeps/powerpc/atomic-machine.h directly.
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* Alway use include/atomic.h which will include either
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* sysdeps/powerpc/powerpc32/atomic-machine.h
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* or
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* sysdeps/powerpc/powerpc64/atomic-machine.h
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* as appropriate and which in turn include this file.
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*/
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#include <stdint.h>
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef int64_t atomic64_t;
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typedef uint64_t uatomic64_t;
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typedef int_fast64_t atomic_fast64_t;
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typedef uint_fast64_t uatomic_fast64_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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/*
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* Powerpc does not have byte and halfword forms of load and reserve and
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* store conditional. So for powerpc we stub out the 8- and 16-bit forms.
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*/
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#define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \
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(abort (), 0)
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#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
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(abort (), 0)
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#define __ARCH_ACQ_INSTR "isync"
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#ifndef __ARCH_REL_INSTR
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# define __ARCH_REL_INSTR "sync"
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#endif
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#ifndef MUTEX_HINT_ACQ
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# define MUTEX_HINT_ACQ
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#endif
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#ifndef MUTEX_HINT_REL
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# define MUTEX_HINT_REL
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#endif
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#define atomic_full_barrier() __asm ("sync" ::: "memory")
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __tmp; \
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__typeof (mem) __memp = (mem); \
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__asm __volatile ( \
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"1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
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" cmpw %0,%2\n" \
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" bne 2f\n" \
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" stwcx. %3,0,%1\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&r" (__tmp) \
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: "b" (__memp), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp; \
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})
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#define __arch_compare_and_exchange_val_32_rel(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __tmp; \
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__typeof (mem) __memp = (mem); \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
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" cmpw %0,%2\n" \
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" bne 2f\n" \
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" stwcx. %3,0,%1\n" \
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" bne- 1b\n" \
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"2: " \
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: "=&r" (__tmp) \
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: "b" (__memp), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp; \
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})
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#define __arch_atomic_exchange_32_acq(mem, value) \
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({ \
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__typeof (*mem) __val; \
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__asm __volatile ( \
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"1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
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" stwcx. %3,0,%2\n" \
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" bne- 1b\n" \
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" " __ARCH_ACQ_INSTR \
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: "=&r" (__val), "=m" (*mem) \
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: "b" (mem), "r" (value), "m" (*mem) \
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_exchange_32_rel(mem, value) \
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({ \
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__typeof (*mem) __val; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
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" stwcx. %3,0,%2\n" \
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" bne- 1b" \
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: "=&r" (__val), "=m" (*mem) \
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: "b" (mem), "r" (value), "m" (*mem) \
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_exchange_and_add_32(mem, value) \
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({ \
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__typeof (*mem) __val, __tmp; \
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__asm __volatile ("1: lwarx %0,0,%3\n" \
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" add %1,%0,%4\n" \
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" stwcx. %1,0,%3\n" \
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" bne- 1b" \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "b" (mem), "r" (value), "m" (*mem) \
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_exchange_and_add_32_acq(mem, value) \
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({ \
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__typeof (*mem) __val, __tmp; \
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__asm __volatile ("1: lwarx %0,0,%3" MUTEX_HINT_ACQ "\n" \
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" add %1,%0,%4\n" \
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" stwcx. %1,0,%3\n" \
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" bne- 1b\n" \
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__ARCH_ACQ_INSTR \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "b" (mem), "r" (value), "m" (*mem) \
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_exchange_and_add_32_rel(mem, value) \
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({ \
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__typeof (*mem) __val, __tmp; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: lwarx %0,0,%3" MUTEX_HINT_REL "\n" \
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" add %1,%0,%4\n" \
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" stwcx. %1,0,%3\n" \
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" bne- 1b" \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "b" (mem), "r" (value), "m" (*mem) \
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_increment_val_32(mem) \
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({ \
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__typeof (*(mem)) __val; \
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__asm __volatile ("1: lwarx %0,0,%2\n" \
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" addi %0,%0,1\n" \
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" stwcx. %0,0,%2\n" \
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" bne- 1b" \
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: "=&b" (__val), "=m" (*mem) \
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: "b" (mem), "m" (*mem) \
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_decrement_val_32(mem) \
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({ \
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__typeof (*(mem)) __val; \
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__asm __volatile ("1: lwarx %0,0,%2\n" \
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" subi %0,%0,1\n" \
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" stwcx. %0,0,%2\n" \
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" bne- 1b" \
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: "=&b" (__val), "=m" (*mem) \
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: "b" (mem), "m" (*mem) \
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_decrement_if_positive_32(mem) \
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({ int __val, __tmp; \
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__asm __volatile ("1: lwarx %0,0,%3\n" \
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" cmpwi 0,%0,0\n" \
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" addi %1,%0,-1\n" \
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" ble 2f\n" \
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" stwcx. %1,0,%3\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "b" (mem), "m" (*mem) \
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: "cr0", "memory"); \
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__val; \
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})
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#define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_compare_and_exchange_val_32_acq(mem, newval, oldval); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_compare_and_exchange_val_64_acq(mem, newval, oldval); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_compare_and_exchange_val_rel(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_compare_and_exchange_val_32_rel(mem, newval, oldval); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_compare_and_exchange_val_64_rel(mem, newval, oldval); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_exchange_acq(mem, value) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_atomic_exchange_32_acq (mem, value); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_atomic_exchange_64_acq (mem, value); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_exchange_rel(mem, value) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_atomic_exchange_32_rel (mem, value); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_atomic_exchange_64_rel (mem, value); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_exchange_and_add(mem, value) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_atomic_exchange_and_add_32 (mem, value); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_atomic_exchange_and_add_64 (mem, value); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_exchange_and_add_acq(mem, value) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_atomic_exchange_and_add_32_acq (mem, value); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_atomic_exchange_and_add_64_acq (mem, value); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_exchange_and_add_rel(mem, value) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_atomic_exchange_and_add_32_rel (mem, value); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_atomic_exchange_and_add_64_rel (mem, value); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_increment_val(mem) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*(mem)) == 4) \
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__result = __arch_atomic_increment_val_32 (mem); \
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else if (sizeof (*(mem)) == 8) \
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__result = __arch_atomic_increment_val_64 (mem); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_increment(mem) ({ atomic_increment_val (mem); (void) 0; })
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#define atomic_decrement_val(mem) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*(mem)) == 4) \
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__result = __arch_atomic_decrement_val_32 (mem); \
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else if (sizeof (*(mem)) == 8) \
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__result = __arch_atomic_decrement_val_64 (mem); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_decrement(mem) ({ atomic_decrement_val (mem); (void) 0; })
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/* Decrement *MEM if it is > 0, and return the old value. */
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#define atomic_decrement_if_positive(mem) \
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({ __typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_atomic_decrement_if_positive_32 (mem); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_atomic_decrement_if_positive_64 (mem); \
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else \
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abort (); \
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__result; \
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})
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