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85dd100310
* sysdeps/i386/fpu/ftestexcept.c: Also check SSE status word. * include/signal.h: Use libc_hidden_proto for sigaddset and sigdelset. * signal/sigaddset.c: Add libc_hidden_def. * signal/sigdelset.c: Likewise. 2003-04-29 Jakub Jelinek <jakub@redhat.com> * sysdeps/i386/i486/string-inlines.c (__memcpy_g, __strchr_g): Move to the end of the file. * configure.in: Change __oline__ to $LINENO. (HAVE_BUILTIN_REDIRECTION): New check. * config.h.in (HAVE_BUILTIN_REDIRECTION): Add. * include/libc-symbols.h (libc_hidden_builtin_proto, libc_hidden_builtin_def, libc_hidden_builtin_weak, libc_hidden_builtin_ver): Define. * include/string.h (memchr, memcpy, memmove, memset, strcat, strchr, strcmp, strcpy, strcspn, strlen, strncmp, strncpy, strpbrk, strrchr, strspn, strstr): Add libc_hidden_builtin_proto. * intl/plural.y: Include string.h. * sysdeps/alpha/alphaev6/memchr.S (memchr): Add libc_hidden_builtin_def. * sysdeps/alpha/alphaev6/memcpy.S (memcpy): Likewise. * sysdeps/alpha/alphaev6/memset.S (memset): Likewise. * sysdeps/alpha/alphaev67/strcat.S (strcat): Likewise. * sysdeps/alpha/alphaev67/strchr.S (strchr): Likewise. * sysdeps/alpha/alphaev67/strlen.S (strlen): Likewise. * sysdeps/alpha/alphaev67/strrchr.S (strrchr): Likewise. * sysdeps/alpha/memchr.S (memchr): Likewise. * sysdeps/alpha/memset.S (memset): Likewise. * sysdeps/alpha/strcat.S (strcat): Likewise. * sysdeps/alpha/strchr.S (strchr): Likewise. * sysdeps/alpha/strcmp.S (strcmp): Likewise. * sysdeps/alpha/strcpy.S (strcpy): Likewise. * sysdeps/alpha/strlen.S (strlen): Likewise. * sysdeps/alpha/strncmp.S (strncmp): Likewise. * sysdeps/alpha/strncpy.S (strncpy): Likewise. * sysdeps/alpha/strrchr.S (strrchr): Likewise. * sysdeps/arm/memset.S (memset): Likewise. * sysdeps/arm/strlen.S (strlen): Likewise. * sysdeps/generic/memchr.c (memchr): Likewise. * sysdeps/generic/memcpy.c (memcpy): Likewise. * sysdeps/generic/memmove.c (memmove): Likewise. * sysdeps/generic/memset.c (memset): Likewise. * sysdeps/generic/strcat.c (strcat): Likewise. * sysdeps/generic/strchr.c (strchr): Likewise. * sysdeps/generic/strcmp.c (strcmp): Likewise. * sysdeps/generic/strcpy.c (strcpy): Likewise. * sysdeps/generic/strcspn.c (strcspn): Likewise. * sysdeps/generic/strlen.c (strlen): Likewise. * sysdeps/generic/strncmp.c (strncmp): Likewise. * sysdeps/generic/strncpy.c (strncpy): Likewise. * sysdeps/generic/strpbrk.c (strpbrk): Likewise. * sysdeps/generic/strrchr.c (strrchr): Likewise. * sysdeps/generic/strspn.c (strspn): Likewise. * sysdeps/generic/strstr.c (strstr): Likewise. * sysdeps/i386/i486/strcat.S (strcat): Likewise. * sysdeps/i386/i486/strlen.S (strlen): Likewise. * sysdeps/i386/i586/memcpy.S (memcpy): Likewise. * sysdeps/i386/i586/memset.S (memset): Likewise. * sysdeps/i386/i586/strchr.S (strchr): Likewise. * sysdeps/i386/i586/strcpy.S (strcpy): Likewise. * sysdeps/i386/i586/strlen.S (strlen): Likewise. * sysdeps/i386/i686/memcpy.S (memcpy): Likewise. * sysdeps/i386/i686/memmove.S (memmove): Likewise. * sysdeps/i386/i686/memset.S (memset): Likewise. * sysdeps/i386/i686/strcmp.S (strcmp): Likewise. * sysdeps/i386/memchr.S (memchr): Likewise. * sysdeps/i386/memset.c (memset): Likewise. * sysdeps/i386/strchr.S (strchr): Likewise. * sysdeps/i386/strcspn.S (strcspn): Likewise. * sysdeps/i386/strlen.c (strlen): Likewise. * sysdeps/i386/strpbrk.S (strpbrk): Likewise. * sysdeps/i386/strrchr.S (strrchr): Likewise. * sysdeps/i386/strspn.S (strspn): Likewise. * sysdeps/ia64/memchr.S (memchr): Likewise. * sysdeps/ia64/memcpy.S (memcpy): Likewise. * sysdeps/ia64/memmove.S (memmove): Likewise. * sysdeps/ia64/memset.S (memset): Likewise. * sysdeps/ia64/strcat.S (strcat): Likewise. * sysdeps/ia64/strchr.S (strchr): Likewise. * sysdeps/ia64/strcmp.S (strcmp): Likewise. * sysdeps/ia64/strcpy.S (strcpy): Likewise. * sysdeps/ia64/strlen.S (strlen): Likewise. * sysdeps/ia64/strncmp.S (strncmp): Likewise. * sysdeps/ia64/strncpy.S (strncpy): Likewise. * sysdeps/m68k/memchr.S (memchr): Likewise. * sysdeps/m68k/strchr.S (strchr): Likewise. * sysdeps/mips/mips64/memcpy.S (memcpy): Likewise. * sysdeps/mips/mips64/memset.S (memset): Likewise. * sysdeps/mips/memcpy.S (memcpy): Likewise. * sysdeps/mips/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc32/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc32/strchr.S (strchr): Likewise. * sysdeps/powerpc/powerpc32/strcmp.S (strcmp): Likewise. * sysdeps/powerpc/powerpc32/strcpy.S (strcpy): Likewise. * sysdeps/powerpc/powerpc32/strlen.S (strlen): Likewise. * sysdeps/powerpc/powerpc64/memcpy.S (memcpy): Likewise. * sysdeps/powerpc/powerpc64/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc64/strchr.S (strchr): Likewise. * sysdeps/powerpc/powerpc64/strcmp.S (strcmp): Likewise. * sysdeps/powerpc/powerpc64/strcpy.S (strcpy): Likewise. * sysdeps/powerpc/powerpc64/strlen.S (strlen): Likewise. * sysdeps/powerpc/strcat.c (strcat): Likewise. * sysdeps/sparc/sparc32/memchr.S (memchr): Likewise. * sysdeps/sparc/sparc32/memcpy.S (memcpy): Likewise. * sysdeps/sparc/sparc32/memset.S (memset): Likewise. * sysdeps/sparc/sparc32/strcat.S (strcat): Likewise. * sysdeps/sparc/sparc32/strchr.S (strchr, strrchr): Likewise. * sysdeps/sparc/sparc32/strcmp.S (strcmp): Likewise. * sysdeps/sparc/sparc32/strcpy.S (strcpy): Likewise. * sysdeps/sparc/sparc32/strlen.S (strlen): Likewise. * sysdeps/sparc/sparc64/sparcv9b/memcpy.S (memcpy, memmove): Likewise. * sysdeps/sparc/sparc64/memchr.S (memchr): Likewise. * sysdeps/sparc/sparc64/memcpy.S (memcpy, memmove): Likewise. * sysdeps/sparc/sparc64/memset.S (memset): Likewise. * sysdeps/sparc/sparc64/strcat.S (strcat): Likewise. * sysdeps/sparc/sparc64/strchr.S (strchr, strrchr): Likewise. * sysdeps/sparc/sparc64/strcmp.S (strcmp): Likewise. * sysdeps/sparc/sparc64/strcpy.S (strcpy): Likewise. * sysdeps/sparc/sparc64/strcspn.S (strcspn): Likewise. * sysdeps/sparc/sparc64/strlen.S (strlen): Likewise. * sysdeps/sparc/sparc64/strncmp.S (strncmp): Likewise. * sysdeps/sparc/sparc64/strncpy.S (strncpy): Likewise. * sysdeps/sparc/sparc64/strpbrk.S (strpbrk): Likewise. * sysdeps/sparc/sparc64/strspn.S (strspn): Likewise. * sysdeps/sh/memcpy.S (memcpy): Likewise. * sysdeps/sh/memset.S (memset): Likewise. * sysdeps/sh/strlen.S (strlen): Likewise. * sysdeps/s390/s390-32/memchr.S (memchr): Likewise. * sysdeps/s390/s390-32/memcpy.S (memcpy): Likewise. * sysdeps/s390/s390-32/memset.S (memset): Likewise. * sysdeps/s390/s390-32/strcmp.S (strcmp): Likewise. * sysdeps/s390/s390-32/strcpy.S (strcpy): Likewise. * sysdeps/s390/s390-32/strncpy.S (strncpy): Likewise. * sysdeps/s390/s390-64/memchr.S (memchr): Likewise. * sysdeps/s390/s390-64/memcpy.S (memcpy): Likewise. * sysdeps/s390/s390-64/memset.S (memset): Likewise. * sysdeps/s390/s390-64/strcmp.S (strcmp): Likewise. * sysdeps/s390/s390-64/strcpy.S (strcpy): Likewise. * sysdeps/s390/s390-64/strncpy.S (strncpy): Likewise. * sysdeps/x86_64/memcpy.S (memcpy): Likewise. * sysdeps/x86_64/memset.S (memset): Likewise. * sysdeps/x86_64/strcat.S (strcat): Likewise. * sysdeps/x86_64/strchr.S (strchr): Likewise. * sysdeps/x86_64/strcmp.S (strcmp): Likewise. * sysdeps/x86_64/strcpy.S (strcpy): Likewise. * sysdeps/x86_64/strcspn.S (strcspn): Likewise. * sysdeps/x86_64/strlen.S (strlen): Likewise. * sysdeps/x86_64/strspn.S (strspn): Likewise. * string/string-inlines.c: Move... * sysdeps/generic/string-inlines.c: ...here. (__memcpy_g, __strchr_g): Remove. (__NO_INLINE__): Define before including <string.h>, undefine after. Include bits/string.h and bits/string2.h. * sysdeps/i386/i486/string-inlines.c: New file. * sysdeps/i386/string-inlines.c: New file. * sysdeps/i386/i486/Versions: Remove. All GLIBC_2.1.1 symbols moved... * sysdeps/i386/Versions (libc): ...here. 2003-04-29 Ulrich Drepper <drepper@redhat.com>
716 lines
23 KiB
ArmAsm
716 lines
23 KiB
ArmAsm
/* Copy SIZE bytes from SRC to DEST.
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For UltraSPARC-III.
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Copyright (C) 2001, 2003 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David S. Miller (davem@redhat.com)
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <sysdep.h>
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#define ASI_BLK_P 0xf0
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#define FPRS_FEF 0x04
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#define VISEntryHalf rd %fprs, %o5; wr %g0, FPRS_FEF, %fprs
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#define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
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#define SMALL_COPY_USES_FPU
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#ifndef XCC
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#define USE_BPR
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#define XCC xcc
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#endif
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.text
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.align 32
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ENTRY(bcopy)
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sub %o1, %o0, %o4 /* IEU0 Group */
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mov %o0, %g3 /* IEU1 */
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cmp %o4, %o2 /* IEU1 Group */
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mov %o1, %o0 /* IEU0 */
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bgeu,pt %XCC, 100f /* CTI */
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mov %g3, %o1 /* IEU0 Group */
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#ifndef USE_BPR
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srl %o2, 0, %o2 /* IEU1 */
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#endif
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brnz,pn %o2, 220f /* CTI Group */
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add %o0, %o2, %o0 /* IEU0 */
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retl
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nop
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END(bcopy)
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/* Special/non-trivial issues of this code:
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*
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* 1) %o5 is preserved from VISEntryHalf to VISExitHalf
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* 2) Only low 32 FPU registers are used so that only the
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* lower half of the FPU register set is dirtied by this
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* code. This is especially important in the kernel.
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* 3) This code never prefetches cachelines past the end
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* of the source buffer.
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*
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* The cheetah's flexible spine, oversized liver, enlarged heart,
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* slender muscular body, and claws make it the swiftest hunter
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* in Africa and the fastest animal on land. Can reach speeds
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* of up to 2.4GB per second.
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*/
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.align 32
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ENTRY(memcpy)
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100: /* %o0=dst, %o1=src, %o2=len */
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#ifndef __KERNEL__
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/* Save away original 'dst' for memcpy return value. */
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mov %o0, %g3 ! A0 Group
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#endif
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/* Anything to copy at all? */
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cmp %o2, 0 ! A1
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ble,pn %XCC, 102f ! BR
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/* Extremely small copy? */
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218: cmp %o2, 31 ! A0 Group
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ble,pn %XCC, 101f ! BR
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/* Large enough to use unrolled prefetch loops? */
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cmp %o2, 0x100 ! A1
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bge,a,pt %XCC, 103f ! BR Group
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andcc %o0, 0x3f, %g2 ! A0
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ba,pt %XCC, 108f ! BR Group
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andcc %o0, 0x7, %g2 ! A0
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.align 32
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101:
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/* Copy %o2 bytes from src to dst, one byte at a time. */
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ldub [%o1 + 0x00], %o3 ! MS Group
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add %o1, 0x1, %o1 ! A0
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add %o0, 0x1, %o0 ! A1
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subcc %o2, 1, %o2 ! A0 Group
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bg,pt %XCC, 101b ! BR
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stb %o3, [%o0 + -1] ! MS Group (1-cycle stall)
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102:
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#ifdef __KERNEL__
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retl ! BR Group (0-4 cycle stall)
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clr %o0 ! A0
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#else
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retl ! BR Group (0-4 cycle stall)
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mov %g3, %o0 ! A0
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#endif
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/* Here len >= (6 * 64) and condition codes reflect execution
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* of "andcc %o0, 0x7, %g2", done by caller.
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*/
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.align 64
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103:
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/* Is 'dst' already aligned on an 64-byte boundary? */
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be,pt %XCC, 2f ! BR
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/* Compute abs((dst & 0x3f) - 0x40) into %g2. This is the number
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* of bytes to copy to make 'dst' 64-byte aligned. We pre-
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* subtract this from 'len'.
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*/
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sub %g2, 0x40, %g2 ! A0 Group
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sub %g0, %g2, %g2 ! A0 Group
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sub %o2, %g2, %o2 ! A0 Group
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/* Copy %g2 bytes from src to dst, one byte at a time. */
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1: ldub [%o1 + 0x00], %o3 ! MS (Group)
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add %o1, 0x1, %o1 ! A1
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add %o0, 0x1, %o0 ! A0 Group
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subcc %g2, 0x1, %g2 ! A1
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bg,pt %XCC, 1b ! BR Group
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stb %o3, [%o0 + -1] ! MS Group
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2: VISEntryHalf ! MS+MS
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and %o1, 0x7, %g1 ! A1
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ba,pt %XCC, 104f ! BR
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alignaddr %o1, %g0, %o1 ! MS (Break-after)
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.align 64
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104:
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prefetch [%o1 + 0x000], #one_read ! MS Group1
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prefetch [%o1 + 0x040], #one_read ! MS Group2
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andn %o2, (0x40 - 1), %o4 ! A0
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prefetch [%o1 + 0x080], #one_read ! MS Group3
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cmp %o4, 0x140 ! A0
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prefetch [%o1 + 0x0c0], #one_read ! MS Group4
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ldd [%o1 + 0x000], %f0 ! MS Group5 (%f0 results at G8)
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bge,a,pt %XCC, 1f ! BR
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prefetch [%o1 + 0x100], #one_read ! MS Group6
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1: ldd [%o1 + 0x008], %f2 ! AX (%f2 results at G9)
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cmp %o4, 0x180 ! A1
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bge,a,pt %XCC, 1f ! BR
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prefetch [%o1 + 0x140], #one_read ! MS Group7
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1: ldd [%o1 + 0x010], %f4 ! AX (%f4 results at G10)
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cmp %o4, 0x1c0 ! A1
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bge,a,pt %XCC, 1f ! BR
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prefetch [%o1 + 0x180], #one_read ! MS Group8
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1: faligndata %f0, %f2, %f16 ! FGA Group9 (%f16 at G12)
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ldd [%o1 + 0x018], %f6 ! AX (%f6 results at G12)
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faligndata %f2, %f4, %f18 ! FGA Group10 (%f18 results at G13)
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ldd [%o1 + 0x020], %f8 ! MS (%f8 results at G13)
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faligndata %f4, %f6, %f20 ! FGA Group12 (1-cycle stall,%f20 at G15)
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ldd [%o1 + 0x028], %f10 ! MS (%f10 results at G15)
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faligndata %f6, %f8, %f22 ! FGA Group13 (%f22 results at G16)
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ldd [%o1 + 0x030], %f12 ! MS (%f12 results at G16)
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faligndata %f8, %f10, %f24 ! FGA Group15 (1-cycle stall,%f24 at G18)
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ldd [%o1 + 0x038], %f14 ! MS (%f14 results at G18)
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faligndata %f10, %f12, %f26 ! FGA Group16 (%f26 results at G19)
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ldd [%o1 + 0x040], %f0 ! MS (%f0 results at G19)
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/* We only use the first loop if len > (7 * 64). */
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subcc %o4, 0x1c0, %o4 ! A0 Group17
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bg,pt %XCC, 105f ! BR
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add %o1, 0x40, %o1 ! A1
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add %o4, 0x140, %o4 ! A0 Group18
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ba,pt %XCC, 106f ! BR
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srl %o4, 6, %o3 ! A0 Group19
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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/* This loop performs the copy and queues new prefetches.
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* We drop into the second loop when len <= (5 * 64). Note
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* that this (5 * 64) factor has been subtracted from len
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* already.
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*/
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105:
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ldd [%o1 + 0x008], %f2 ! MS Group2 (%f2 results at G5)
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faligndata %f12, %f14, %f28 ! FGA (%f28 results at G5)
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ldd [%o1 + 0x010], %f4 ! MS Group3 (%f4 results at G6)
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faligndata %f14, %f0, %f30 ! FGA Group4 (1-cycle stall, %f30 at G7)
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stda %f16, [%o0] ASI_BLK_P ! MS
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ldd [%o1 + 0x018], %f6 ! AX (%f6 results at G7)
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faligndata %f0, %f2, %f16 ! FGA Group12 (7-cycle stall)
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ldd [%o1 + 0x020], %f8 ! MS (%f8 results at G15)
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faligndata %f2, %f4, %f18 ! FGA Group13 (%f18 results at G16)
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ldd [%o1 + 0x028], %f10 ! MS (%f10 results at G16)
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faligndata %f4, %f6, %f20 ! FGA Group14 (%f20 results at G17)
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ldd [%o1 + 0x030], %f12 ! MS (%f12 results at G17)
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faligndata %f6, %f8, %f22 ! FGA Group15 (%f22 results at G18)
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ldd [%o1 + 0x038], %f14 ! MS (%f14 results at G18)
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faligndata %f8, %f10, %f24 ! FGA Group16 (%f24 results at G19)
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ldd [%o1 + 0x040], %f0 ! AX (%f0 results at G19)
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prefetch [%o1 + 0x180], #one_read ! MS
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faligndata %f10, %f12, %f26 ! FGA Group17 (%f26 results at G20)
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subcc %o4, 0x40, %o4 ! A0
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add %o1, 0x40, %o1 ! A1
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bg,pt %XCC, 105b ! BR
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add %o0, 0x40, %o0 ! A0 Group18
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mov 5, %o3 ! A1
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/* This loop performs on the copy, no new prefetches are
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* queued. We do things this way so that we do not perform
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* any spurious prefetches past the end of the src buffer.
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*/
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106:
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ldd [%o1 + 0x008], %f2 ! MS
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faligndata %f12, %f14, %f28 ! FGA Group2
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ldd [%o1 + 0x010], %f4 ! MS
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faligndata %f14, %f0, %f30 ! FGA Group4 (1-cycle stall)
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stda %f16, [%o0] ASI_BLK_P ! MS
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ldd [%o1 + 0x018], %f6 ! AX
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faligndata %f0, %f2, %f16 ! FGA Group12 (7-cycle stall)
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ldd [%o1 + 0x020], %f8 ! MS
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faligndata %f2, %f4, %f18 ! FGA Group13
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ldd [%o1 + 0x028], %f10 ! MS
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faligndata %f4, %f6, %f20 ! FGA Group14
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ldd [%o1 + 0x030], %f12 ! MS
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faligndata %f6, %f8, %f22 ! FGA Group15
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ldd [%o1 + 0x038], %f14 ! MS
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faligndata %f8, %f10, %f24 ! FGA Group16
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ldd [%o1 + 0x040], %f0 ! AX
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faligndata %f10, %f12, %f26 ! FGA Group17
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subcc %o3, 0x01, %o3 ! A0
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add %o1, 0x40, %o1 ! A1
|
|
bg,pt %XCC, 106b ! BR
|
|
add %o0, 0x40, %o0 ! A0 Group18
|
|
|
|
/* Finally we copy the last full 64-byte block. */
|
|
ldd [%o1 + 0x008], %f2 ! MS
|
|
faligndata %f12, %f14, %f28 ! FGA
|
|
ldd [%o1 + 0x010], %f4 ! MS Group19
|
|
faligndata %f14, %f0, %f30 ! FGA
|
|
stda %f16, [%o0] ASI_BLK_P ! MS Group20
|
|
ldd [%o1 + 0x018], %f6 ! AX
|
|
faligndata %f0, %f2, %f16 ! FGA Group11 (7-cycle stall)
|
|
ldd [%o1 + 0x020], %f8 ! MS
|
|
faligndata %f2, %f4, %f18 ! FGA Group12
|
|
ldd [%o1 + 0x028], %f10 ! MS
|
|
faligndata %f4, %f6, %f20 ! FGA Group13
|
|
ldd [%o1 + 0x030], %f12 ! MS
|
|
faligndata %f6, %f8, %f22 ! FGA Group14
|
|
ldd [%o1 + 0x038], %f14 ! MS
|
|
faligndata %f8, %f10, %f24 ! FGA Group15
|
|
cmp %g1, 0 ! A0
|
|
be,pt %XCC, 1f ! BR
|
|
add %o0, 0x40, %o0 ! A1
|
|
ldd [%o1 + 0x040], %f0 ! MS
|
|
1: faligndata %f10, %f12, %f26 ! FGA Group16
|
|
faligndata %f12, %f14, %f28 ! FGA Group17
|
|
faligndata %f14, %f0, %f30 ! FGA Group18
|
|
stda %f16, [%o0] ASI_BLK_P ! MS
|
|
add %o0, 0x40, %o0 ! A0
|
|
add %o1, 0x40, %o1 ! A1
|
|
membar #Sync ! MS Group26 (7-cycle stall)
|
|
|
|
/* Now we copy the (len modulo 64) bytes at the end.
|
|
* Note how we borrow the %f0 loaded above.
|
|
*
|
|
* Also notice how this code is careful not to perform a
|
|
* load past the end of the src buffer just like similar
|
|
* code found in 'toosmall' processing.
|
|
*/
|
|
and %o2, 0x3f, %o2 ! A0 Group
|
|
andcc %o2, 0x38, %g2 ! A0 Group
|
|
be,pn %XCC, 107f ! BR
|
|
subcc %g2, 0x8, %g2 ! A1
|
|
be,pn %XCC, 107f ! BR Group
|
|
cmp %g1, 0 ! A0
|
|
|
|
be,a,pt %XCC, 1f ! BR Group
|
|
ldd [%o1 + 0x00], %f0 ! MS
|
|
|
|
1: ldd [%o1 + 0x08], %f2 ! MS Group
|
|
add %o1, 0x8, %o1 ! A0
|
|
sub %o2, 0x8, %o2 ! A1
|
|
subcc %g2, 0x8, %g2 ! A0 Group
|
|
faligndata %f0, %f2, %f8 ! FGA Group
|
|
std %f8, [%o0 + 0x00] ! MS (XXX does it stall here? XXX)
|
|
be,pn %XCC, 107f ! BR
|
|
add %o0, 0x8, %o0 ! A0
|
|
ldd [%o1 + 0x08], %f0 ! MS Group
|
|
add %o1, 0x8, %o1 ! A0
|
|
sub %o2, 0x8, %o2 ! A1
|
|
subcc %g2, 0x8, %g2 ! A0 Group
|
|
faligndata %f2, %f0, %f8 ! FGA
|
|
std %f8, [%o0 + 0x00] ! MS (XXX does it stall here? XXX)
|
|
bne,pn %XCC, 1b ! BR
|
|
add %o0, 0x8, %o0 ! A0 Group
|
|
|
|
/* If anything is left, we copy it one byte at a time.
|
|
* Note that %g1 is (src & 0x3) saved above before the
|
|
* alignaddr was performed.
|
|
*/
|
|
107:
|
|
cmp %o2, 0
|
|
add %o1, %g1, %o1
|
|
VISExitHalf
|
|
be,pn %XCC, 102b
|
|
nop
|
|
ba,a,pt %XCC, 101b
|
|
|
|
/* If we get here, then 32 <= len < (6 * 64) */
|
|
108:
|
|
|
|
#ifdef SMALL_COPY_USES_FPU
|
|
|
|
/* Is 'dst' already aligned on an 8-byte boundary? */
|
|
be,pt %XCC, 2f ! BR Group
|
|
|
|
/* Compute abs((dst & 7) - 8) into %g2. This is the number
|
|
* of bytes to copy to make 'dst' 8-byte aligned. We pre-
|
|
* subtract this from 'len'.
|
|
*/
|
|
sub %g2, 0x8, %g2 ! A0
|
|
sub %g0, %g2, %g2 ! A0 Group (reg-dep)
|
|
sub %o2, %g2, %o2 ! A0 Group (reg-dep)
|
|
|
|
/* Copy %g2 bytes from src to dst, one byte at a time. */
|
|
1: ldub [%o1 + 0x00], %o3 ! MS (Group) (%o3 in 3 cycles)
|
|
add %o1, 0x1, %o1 ! A1
|
|
add %o0, 0x1, %o0 ! A0 Group
|
|
subcc %g2, 0x1, %g2 ! A1
|
|
|
|
bg,pt %XCC, 1b ! BR Group
|
|
stb %o3, [%o0 + -1] ! MS Group
|
|
|
|
2: VISEntryHalf ! MS+MS
|
|
|
|
/* Compute (len - (len % 8)) into %g2. This is guarenteed
|
|
* to be nonzero.
|
|
*/
|
|
andn %o2, 0x7, %g2 ! A0 Group
|
|
|
|
/* You may read this and believe that it allows reading
|
|
* one 8-byte longword past the end of src. It actually
|
|
* does not, as %g2 is subtracted as loads are done from
|
|
* src, so we always stop before running off the end.
|
|
* Also, we are guarenteed to have at least 0x10 bytes
|
|
* to move here.
|
|
*/
|
|
sub %g2, 0x8, %g2 ! A0 Group (reg-dep)
|
|
alignaddr %o1, %g0, %g1 ! MS (Break-after)
|
|
ldd [%g1 + 0x00], %f0 ! MS Group (1-cycle stall)
|
|
add %g1, 0x8, %g1 ! A0
|
|
|
|
1: ldd [%g1 + 0x00], %f2 ! MS Group
|
|
add %g1, 0x8, %g1 ! A0
|
|
sub %o2, 0x8, %o2 ! A1
|
|
subcc %g2, 0x8, %g2 ! A0 Group
|
|
|
|
faligndata %f0, %f2, %f8 ! FGA Group (1-cycle stall)
|
|
std %f8, [%o0 + 0x00] ! MS Group (2-cycle stall)
|
|
add %o1, 0x8, %o1 ! A0
|
|
be,pn %XCC, 2f ! BR
|
|
|
|
add %o0, 0x8, %o0 ! A1
|
|
ldd [%g1 + 0x00], %f0 ! MS Group
|
|
add %g1, 0x8, %g1 ! A0
|
|
sub %o2, 0x8, %o2 ! A1
|
|
|
|
subcc %g2, 0x8, %g2 ! A0 Group
|
|
faligndata %f2, %f0, %f8 ! FGA Group (1-cycle stall)
|
|
std %f8, [%o0 + 0x00] ! MS Group (2-cycle stall)
|
|
add %o1, 0x8, %o1 ! A0
|
|
|
|
bne,pn %XCC, 1b ! BR
|
|
add %o0, 0x8, %o0 ! A1
|
|
|
|
/* Nothing left to copy? */
|
|
2: cmp %o2, 0 ! A0 Group
|
|
VISExitHalf ! A0+MS
|
|
be,pn %XCC, 102b ! BR Group
|
|
nop ! A0
|
|
ba,a,pt %XCC, 101b ! BR Group
|
|
|
|
#else /* !(SMALL_COPY_USES_FPU) */
|
|
|
|
xor %o1, %o0, %g2
|
|
andcc %g2, 0x7, %g0
|
|
bne,pn %XCC, 101b
|
|
andcc %o1, 0x7, %g2
|
|
|
|
be,pt %XCC, 2f
|
|
sub %g2, 0x8, %g2
|
|
sub %g0, %g2, %g2
|
|
sub %o2, %g2, %o2
|
|
|
|
1: ldub [%o1 + 0x00], %o3
|
|
add %o1, 0x1, %o1
|
|
add %o0, 0x1, %o0
|
|
subcc %g2, 0x1, %g2
|
|
bg,pt %XCC, 1b
|
|
stb %o3, [%o0 + -1]
|
|
|
|
2: andn %o2, 0x7, %g2
|
|
sub %o2, %g2, %o2
|
|
|
|
3: ldx [%o1 + 0x00], %o3
|
|
add %o1, 0x8, %o1
|
|
add %o0, 0x8, %o0
|
|
subcc %g2, 0x8, %g2
|
|
bg,pt %XCC, 3b
|
|
stx %o3, [%o0 + -8]
|
|
|
|
cmp %o2, 0
|
|
bne,pn %XCC, 101b
|
|
nop
|
|
ba,a,pt %XCC, 102b
|
|
|
|
#endif /* !(SMALL_COPY_USES_FPU) */
|
|
END(memcpy)
|
|
|
|
#define RMOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3) \
|
|
ldx [%src - offset - 0x20], %t0; \
|
|
ldx [%src - offset - 0x18], %t1; \
|
|
ldx [%src - offset - 0x10], %t2; \
|
|
ldx [%src - offset - 0x08], %t3; \
|
|
stw %t0, [%dst - offset - 0x1c]; \
|
|
srlx %t0, 32, %t0; \
|
|
stw %t0, [%dst - offset - 0x20]; \
|
|
stw %t1, [%dst - offset - 0x14]; \
|
|
srlx %t1, 32, %t1; \
|
|
stw %t1, [%dst - offset - 0x18]; \
|
|
stw %t2, [%dst - offset - 0x0c]; \
|
|
srlx %t2, 32, %t2; \
|
|
stw %t2, [%dst - offset - 0x10]; \
|
|
stw %t3, [%dst - offset - 0x04]; \
|
|
srlx %t3, 32, %t3; \
|
|
stw %t3, [%dst - offset - 0x08];
|
|
|
|
#define RMOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3) \
|
|
ldx [%src - offset - 0x20], %t0; \
|
|
ldx [%src - offset - 0x18], %t1; \
|
|
ldx [%src - offset - 0x10], %t2; \
|
|
ldx [%src - offset - 0x08], %t3; \
|
|
stx %t0, [%dst - offset - 0x20]; \
|
|
stx %t1, [%dst - offset - 0x18]; \
|
|
stx %t2, [%dst - offset - 0x10]; \
|
|
stx %t3, [%dst - offset - 0x08]; \
|
|
ldx [%src - offset - 0x40], %t0; \
|
|
ldx [%src - offset - 0x38], %t1; \
|
|
ldx [%src - offset - 0x30], %t2; \
|
|
ldx [%src - offset - 0x28], %t3; \
|
|
stx %t0, [%dst - offset - 0x40]; \
|
|
stx %t1, [%dst - offset - 0x38]; \
|
|
stx %t2, [%dst - offset - 0x30]; \
|
|
stx %t3, [%dst - offset - 0x28];
|
|
|
|
#define RMOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \
|
|
ldx [%src + offset + 0x00], %t0; \
|
|
ldx [%src + offset + 0x08], %t1; \
|
|
stw %t0, [%dst + offset + 0x04]; \
|
|
srlx %t0, 32, %t2; \
|
|
stw %t2, [%dst + offset + 0x00]; \
|
|
stw %t1, [%dst + offset + 0x0c]; \
|
|
srlx %t1, 32, %t3; \
|
|
stw %t3, [%dst + offset + 0x08];
|
|
|
|
#define RMOVE_LASTALIGNCHUNK(src, dst, offset, t0, t1) \
|
|
ldx [%src + offset + 0x00], %t0; \
|
|
ldx [%src + offset + 0x08], %t1; \
|
|
stx %t0, [%dst + offset + 0x00]; \
|
|
stx %t1, [%dst + offset + 0x08];
|
|
|
|
.align 32
|
|
228: andcc %o2, 1, %g0 /* IEU1 Group */
|
|
be,pt %icc, 2f+4 /* CTI */
|
|
1: ldub [%o1 - 1], %o5 /* LOAD Group */
|
|
sub %o1, 1, %o1 /* IEU0 */
|
|
sub %o0, 1, %o0 /* IEU1 */
|
|
subcc %o2, 1, %o2 /* IEU1 Group */
|
|
be,pn %xcc, 229f /* CTI */
|
|
stb %o5, [%o0] /* Store */
|
|
2: ldub [%o1 - 1], %o5 /* LOAD Group */
|
|
sub %o0, 2, %o0 /* IEU0 */
|
|
ldub [%o1 - 2], %g5 /* LOAD Group */
|
|
sub %o1, 2, %o1 /* IEU0 */
|
|
subcc %o2, 2, %o2 /* IEU1 Group */
|
|
stb %o5, [%o0 + 1] /* Store */
|
|
bne,pt %xcc, 2b /* CTI */
|
|
stb %g5, [%o0] /* Store */
|
|
229: retl
|
|
mov %g4, %o0
|
|
|
|
.align 32
|
|
ENTRY(memmove)
|
|
mov %o0, %g3
|
|
#ifndef USE_BPR
|
|
srl %o2, 0, %o2 /* IEU1 Group */
|
|
#endif
|
|
brz,pn %o2, 102b /* CTI Group */
|
|
sub %o0, %o1, %o4 /* IEU0 */
|
|
cmp %o4, %o2 /* IEU1 Group */
|
|
bgeu,pt %XCC, 218b /* CTI */
|
|
mov %o0, %g4 /* IEU0 */
|
|
add %o0, %o2, %o0 /* IEU0 Group */
|
|
220: add %o1, %o2, %o1 /* IEU1 */
|
|
cmp %o2, 15 /* IEU1 Group */
|
|
bleu,pn %xcc, 228b /* CTI */
|
|
andcc %o0, 7, %g2 /* IEU1 Group */
|
|
sub %o0, %o1, %g5 /* IEU0 */
|
|
andcc %g5, 3, %o5 /* IEU1 Group */
|
|
bne,pn %xcc, 232f /* CTI */
|
|
andcc %o1, 3, %g0 /* IEU1 Group */
|
|
be,a,pt %xcc, 236f /* CTI */
|
|
andcc %o1, 4, %g0 /* IEU1 Group */
|
|
andcc %o1, 1, %g0 /* IEU1 Group */
|
|
be,pn %xcc, 4f /* CTI */
|
|
andcc %o1, 2, %g0 /* IEU1 Group */
|
|
ldub [%o1 - 1], %g2 /* Load Group */
|
|
sub %o1, 1, %o1 /* IEU0 */
|
|
sub %o0, 1, %o0 /* IEU1 */
|
|
sub %o2, 1, %o2 /* IEU0 Group */
|
|
be,pn %xcc, 5f /* CTI Group */
|
|
stb %g2, [%o0] /* Store */
|
|
4: lduh [%o1 - 2], %g2 /* Load Group */
|
|
sub %o1, 2, %o1 /* IEU0 */
|
|
sub %o0, 2, %o0 /* IEU1 */
|
|
sub %o2, 2, %o2 /* IEU0 */
|
|
sth %g2, [%o0] /* Store Group + bubble */
|
|
5: andcc %o1, 4, %g0 /* IEU1 */
|
|
236: be,a,pn %xcc, 2f /* CTI */
|
|
andcc %o2, -128, %g6 /* IEU1 Group */
|
|
lduw [%o1 - 4], %g5 /* Load Group */
|
|
sub %o1, 4, %o1 /* IEU0 */
|
|
sub %o0, 4, %o0 /* IEU1 */
|
|
sub %o2, 4, %o2 /* IEU0 Group */
|
|
stw %g5, [%o0] /* Store */
|
|
andcc %o2, -128, %g6 /* IEU1 Group */
|
|
2: be,pn %xcc, 235f /* CTI */
|
|
andcc %o0, 4, %g0 /* IEU1 Group */
|
|
be,pn %xcc, 282f + 4 /* CTI Group */
|
|
5: RMOVE_BIGCHUNK(o1, o0, 0x00, g1, g3, g5, o5)
|
|
RMOVE_BIGCHUNK(o1, o0, 0x20, g1, g3, g5, o5)
|
|
RMOVE_BIGCHUNK(o1, o0, 0x40, g1, g3, g5, o5)
|
|
RMOVE_BIGCHUNK(o1, o0, 0x60, g1, g3, g5, o5)
|
|
subcc %g6, 128, %g6 /* IEU1 Group */
|
|
sub %o1, 128, %o1 /* IEU0 */
|
|
bne,pt %xcc, 5b /* CTI */
|
|
sub %o0, 128, %o0 /* IEU0 Group */
|
|
235: andcc %o2, 0x70, %g6 /* IEU1 Group */
|
|
41: be,pn %xcc, 280f /* CTI */
|
|
andcc %o2, 8, %g0 /* IEU1 Group */
|
|
/* Clk1 8-( */
|
|
/* Clk2 8-( */
|
|
/* Clk3 8-( */
|
|
/* Clk4 8-( */
|
|
279: rd %pc, %o5 /* PDU Group */
|
|
sll %g6, 1, %g5 /* IEU0 Group */
|
|
sub %o1, %g6, %o1 /* IEU1 */
|
|
sub %o5, %g5, %o5 /* IEU0 Group */
|
|
jmpl %o5 + %lo(280f - 279b), %g0 /* CTI Group brk forced*/
|
|
sub %o0, %g6, %o0 /* IEU0 Group */
|
|
RMOVE_LASTCHUNK(o1, o0, 0x60, g2, g3, g5, o5)
|
|
RMOVE_LASTCHUNK(o1, o0, 0x50, g2, g3, g5, o5)
|
|
RMOVE_LASTCHUNK(o1, o0, 0x40, g2, g3, g5, o5)
|
|
RMOVE_LASTCHUNK(o1, o0, 0x30, g2, g3, g5, o5)
|
|
RMOVE_LASTCHUNK(o1, o0, 0x20, g2, g3, g5, o5)
|
|
RMOVE_LASTCHUNK(o1, o0, 0x10, g2, g3, g5, o5)
|
|
RMOVE_LASTCHUNK(o1, o0, 0x00, g2, g3, g5, o5)
|
|
280: be,pt %xcc, 281f /* CTI */
|
|
andcc %o2, 4, %g0 /* IEU1 */
|
|
ldx [%o1 - 8], %g2 /* Load Group */
|
|
sub %o0, 8, %o0 /* IEU0 */
|
|
stw %g2, [%o0 + 4] /* Store Group */
|
|
sub %o1, 8, %o1 /* IEU1 */
|
|
srlx %g2, 32, %g2 /* IEU0 Group */
|
|
stw %g2, [%o0] /* Store */
|
|
281: be,pt %xcc, 1f /* CTI */
|
|
andcc %o2, 2, %g0 /* IEU1 Group */
|
|
lduw [%o1 - 4], %g2 /* Load Group */
|
|
sub %o1, 4, %o1 /* IEU0 */
|
|
stw %g2, [%o0 - 4] /* Store Group */
|
|
sub %o0, 4, %o0 /* IEU0 */
|
|
1: be,pt %xcc, 1f /* CTI */
|
|
andcc %o2, 1, %g0 /* IEU1 Group */
|
|
lduh [%o1 - 2], %g2 /* Load Group */
|
|
sub %o1, 2, %o1 /* IEU0 */
|
|
sth %g2, [%o0 - 2] /* Store Group */
|
|
sub %o0, 2, %o0 /* IEU0 */
|
|
1: be,pt %xcc, 211f /* CTI */
|
|
nop /* IEU1 */
|
|
ldub [%o1 - 1], %g2 /* Load Group */
|
|
stb %g2, [%o0 - 1] /* Store Group + bubble */
|
|
211: retl
|
|
mov %g4, %o0
|
|
|
|
282: RMOVE_BIGALIGNCHUNK(o1, o0, 0x00, g1, g3, g5, o5)
|
|
RMOVE_BIGALIGNCHUNK(o1, o0, 0x40, g1, g3, g5, o5)
|
|
subcc %g6, 128, %g6 /* IEU1 Group */
|
|
sub %o1, 128, %o1 /* IEU0 */
|
|
bne,pt %xcc, 282b /* CTI */
|
|
sub %o0, 128, %o0 /* IEU0 Group */
|
|
andcc %o2, 0x70, %g6 /* IEU1 */
|
|
be,pn %xcc, 284f /* CTI */
|
|
andcc %o2, 8, %g0 /* IEU1 Group */
|
|
/* Clk1 8-( */
|
|
/* Clk2 8-( */
|
|
/* Clk3 8-( */
|
|
/* Clk4 8-( */
|
|
283: rd %pc, %o5 /* PDU Group */
|
|
sub %o1, %g6, %o1 /* IEU0 Group */
|
|
sub %o5, %g6, %o5 /* IEU1 */
|
|
jmpl %o5 + %lo(284f - 283b), %g0 /* CTI Group brk forced*/
|
|
sub %o0, %g6, %o0 /* IEU0 Group */
|
|
RMOVE_LASTALIGNCHUNK(o1, o0, 0x60, g2, g3)
|
|
RMOVE_LASTALIGNCHUNK(o1, o0, 0x50, g2, g3)
|
|
RMOVE_LASTALIGNCHUNK(o1, o0, 0x40, g2, g3)
|
|
RMOVE_LASTALIGNCHUNK(o1, o0, 0x30, g2, g3)
|
|
RMOVE_LASTALIGNCHUNK(o1, o0, 0x20, g2, g3)
|
|
RMOVE_LASTALIGNCHUNK(o1, o0, 0x10, g2, g3)
|
|
RMOVE_LASTALIGNCHUNK(o1, o0, 0x00, g2, g3)
|
|
284: be,pt %xcc, 285f /* CTI Group */
|
|
andcc %o2, 4, %g0 /* IEU1 */
|
|
ldx [%o1 - 8], %g2 /* Load Group */
|
|
sub %o0, 8, %o0 /* IEU0 */
|
|
sub %o1, 8, %o1 /* IEU0 Group */
|
|
stx %g2, [%o0] /* Store */
|
|
285: be,pt %xcc, 1f /* CTI */
|
|
andcc %o2, 2, %g0 /* IEU1 Group */
|
|
lduw [%o1 - 4], %g2 /* Load Group */
|
|
sub %o0, 4, %o0 /* IEU0 */
|
|
sub %o1, 4, %o1 /* IEU0 Group */
|
|
stw %g2, [%o0] /* Store */
|
|
1: be,pt %xcc, 1f /* CTI */
|
|
andcc %o2, 1, %g0 /* IEU1 Group */
|
|
lduh [%o1 - 2], %g2 /* Load Group */
|
|
sub %o0, 2, %o0 /* IEU0 */
|
|
sub %o1, 2, %o1 /* IEU0 Group */
|
|
sth %g2, [%o0] /* Store */
|
|
1: be,pt %xcc, 1f /* CTI */
|
|
nop /* IEU0 Group */
|
|
ldub [%o1 - 1], %g2 /* Load Group */
|
|
stb %g2, [%o0 - 1] /* Store Group + bubble */
|
|
1: retl
|
|
mov %g4, %o0
|
|
|
|
232: brz,pt %g2, 2f /* CTI Group */
|
|
sub %o2, %g2, %o2 /* IEU0 Group */
|
|
1: ldub [%o1 - 1], %g5 /* Load Group */
|
|
sub %o1, 1, %o1 /* IEU0 */
|
|
sub %o0, 1, %o0 /* IEU1 */
|
|
subcc %g2, 1, %g2 /* IEU1 Group */
|
|
bne,pt %xcc, 1b /* CTI */
|
|
stb %g5, [%o0] /* Store */
|
|
2: andn %o2, 7, %g5 /* IEU0 Group */
|
|
and %o2, 7, %o2 /* IEU1 */
|
|
fmovd %f0, %f2 /* FPU */
|
|
alignaddr %o1, %g0, %g1 /* GRU Group */
|
|
ldd [%g1], %f4 /* Load Group */
|
|
1: ldd [%g1 - 8], %f6 /* Load Group */
|
|
sub %g1, 8, %g1 /* IEU0 Group */
|
|
subcc %g5, 8, %g5 /* IEU1 */
|
|
faligndata %f6, %f4, %f0 /* GRU Group */
|
|
std %f0, [%o0 - 8] /* Store */
|
|
sub %o1, 8, %o1 /* IEU0 Group */
|
|
be,pn %xcc, 233f /* CTI */
|
|
sub %o0, 8, %o0 /* IEU1 */
|
|
ldd [%g1 - 8], %f4 /* Load Group */
|
|
sub %g1, 8, %g1 /* IEU0 */
|
|
subcc %g5, 8, %g5 /* IEU1 */
|
|
faligndata %f4, %f6, %f0 /* GRU Group */
|
|
std %f0, [%o0 - 8] /* Store */
|
|
sub %o1, 8, %o1 /* IEU0 */
|
|
bne,pn %xcc, 1b /* CTI Group */
|
|
sub %o0, 8, %o0 /* IEU0 */
|
|
233: brz,pn %o2, 234f /* CTI Group */
|
|
nop /* IEU0 */
|
|
237: ldub [%o1 - 1], %g5 /* LOAD */
|
|
sub %o1, 1, %o1 /* IEU0 */
|
|
sub %o0, 1, %o0 /* IEU1 */
|
|
subcc %o2, 1, %o2 /* IEU1 */
|
|
bne,pt %xcc, 237b /* CTI */
|
|
stb %g5, [%o0] /* Store Group */
|
|
234: wr %g0, FPRS_FEF, %fprs
|
|
retl
|
|
mov %g4, %o0
|
|
END(memmove)
|
|
|
|
#ifdef USE_BPR
|
|
weak_alias(memcpy, __align_cpy_1)
|
|
weak_alias(memcpy, __align_cpy_2)
|
|
weak_alias(memcpy, __align_cpy_4)
|
|
weak_alias(memcpy, __align_cpy_8)
|
|
weak_alias(memcpy, __align_cpy_16)
|
|
#endif
|
|
libc_hidden_builtin_def (memcpy)
|
|
libc_hidden_builtin_def (memmove)
|