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2b778ceb40
I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 6694 files FOO. I then removed trailing white space from benchtests/bench-pthread-locks.c and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this diagnostic from Savannah: remote: *** pre-commit check failed ... remote: *** error: lines with trailing whitespace found remote: error: hook declined to update refs/heads/master
166 lines
5.0 KiB
ArmAsm
166 lines
5.0 KiB
ArmAsm
/* Set current context.
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Copyright (C) 2009-2021 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Maciej W. Rozycki <macro@codesourcery.com>.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <sys/asm.h>
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#include <sys/fpregdef.h>
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#include <sys/regdef.h>
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#include "ucontext_i.h"
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/* int setcontext (const ucontext_t *ucp) */
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.text
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.set nomips16
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LOCALSZ = 0
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ARGSZ = 0
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MASK = 0x00000000
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#ifdef __PIC__
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LOCALSZ = 1 /* save gp */
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#endif
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#if _MIPS_SIM != _ABIO32
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ARGSZ = 1 /* save a0 */
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# ifdef __PIC__
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MASK = 0x10000000
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# endif
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#endif
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FRAMESZ = (((ARGSZ + LOCALSZ) * SZREG) + ALSZ) & ALMASK
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GPOFF = FRAMESZ - ((ARGSZ + 1) * SZREG)
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#if _MIPS_SIM != _ABIO32
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A0OFF = FRAMESZ - (1 * SZREG) /* callee-allocated */
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#else
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A0OFF = FRAMESZ + (0 * SZREG) /* caller-allocated */
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#endif
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MCONTEXT_GREGSZ = 8
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#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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MCONTEXT_GREGOFF = 4
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#else
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MCONTEXT_GREGOFF = 0
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#endif
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NESTED (__setcontext, FRAMESZ, ra)
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.mask MASK, -(ARGSZ * SZREG)
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.fmask 0x00000000, 0
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#ifdef __PIC__
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SETUP_GP
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#endif
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PTR_ADDIU sp, -FRAMESZ
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cfi_adjust_cfa_offset (FRAMESZ)
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#ifdef __PIC__
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SETUP_GP64_STACK (GPOFF, __setcontext)
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SAVE_GP (GPOFF)
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#endif
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#ifdef PROF
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.set noat
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move AT, ra
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jal _mcount
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.set at
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#endif
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REG_S a0, A0OFF(sp)
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/* rt_sigprocmask (SIG_SETMASK, &ucp->uc_sigmask, NULL, _NSIG8) */
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li a3, _NSIG8
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move a2, zero
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PTR_ADDU a1, a0, UCONTEXT_SIGMASK
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li a0, SIG_SETMASK
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li v0, SYS_ify (rt_sigprocmask)
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syscall
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bnez a3, 99f
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REG_L v0, A0OFF(sp)
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#ifdef __mips_hard_float
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# if _MIPS_SIM == _ABI64
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l.d fs0, (24 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs1, (25 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs2, (26 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs3, (27 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs4, (28 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs5, (29 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs6, (30 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs7, (31 * SZREG + MCONTEXT_FPREGS)(v0)
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# else /* _MIPS_SIM != _ABI64 */
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l.d fs0, (20 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs1, (22 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs2, (24 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs3, (26 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs4, (28 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs5, (30 * SZREG + MCONTEXT_FPREGS)(v0)
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# endif /* _MIPS_SIM != _ABI64 */
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lw v1, MCONTEXT_FPC_CSR(v0)
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ctc1 v1, fcr31
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#endif /* __mips_hard_float */
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/* Note the contents of argument registers will be random
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unless makecontext() has been called. */
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REG_L a0, (MCONTEXT_GREGOFF + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a1, (MCONTEXT_GREGOFF + 5 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a2, (MCONTEXT_GREGOFF + 6 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a3, (MCONTEXT_GREGOFF + 7 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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#if _MIPS_SIM != _ABIO32
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REG_L a4, (MCONTEXT_GREGOFF + 8 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a5, (MCONTEXT_GREGOFF + 9 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a6, (MCONTEXT_GREGOFF + 10 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a7, (MCONTEXT_GREGOFF + 11 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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#endif
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REG_L s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
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REG_L gp, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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#endif
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REG_L sp, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L t9, (MCONTEXT_GREGOFF + MCONTEXT_PC)(v0)
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move v0, zero
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jr t9
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99:
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#ifdef __PIC__
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PTR_LA t9, JUMPTARGET (__syscall_error)
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RESTORE_GP64_STACK
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PTR_ADDIU sp, FRAMESZ
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cfi_adjust_cfa_offset (-FRAMESZ)
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jr t9
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#else /* ! __PIC__ */
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j JUMPTARGET (__syscall_error)
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#endif /* ! __PIC__ */
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PSEUDO_END (__setcontext)
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weak_alias (__setcontext, setcontext)
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