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2002-06-05 Brian Youmans <3diff@gnu.org> * sysdeps/ia64/fpu/e_acos.S: Added text of Intel license. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_atan2_req.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_frexp4.S: Likewise. * sysdeps/ia64/fpu/libm_frexp4f.S: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ieee754/dbl-64/doasin.c: Changed copyright notice to reflect IBM donation of math library to FSF * sysdeps/ieee754/dbl-64/dosincos.c: Likewise. * sysdeps/ieee754/dbl-64/e_asin.c: Likewise. * sysdeps/ieee754/dbl-64/e_atan2.c: Likewise. * sysdeps/ieee754/dbl-64/e_exp.c: Likewise. * sysdeps/ieee754/dbl-64/e_log.c: Likewise. * sysdeps/ieee754/dbl-64/e_pow.c: Likewise. * sysdeps/ieee754/dbl-64/e_remainder.c: Likewise. * sysdeps/ieee754/dbl-64/e_sqrt.c: Likewise. * sysdeps/ieee754/dbl-64/halfulp.c: Likewise. * sysdeps/ieee754/dbl-64/mpa.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan2.c: Likewise. * sysdeps/ieee754/dbl-64/mpexp.c: Likewise. * sysdeps/ieee754/dbl-64/mplog.c: Likewise. * sysdeps/ieee754/dbl-64/mpsqrt.c: Likewise. * sysdeps/ieee754/dbl-64/mptan.c: Likewise. * sysdeps/ieee754/dbl-64/s_atan.c: Likewise. * sysdeps/ieee754/dbl-64/s_sin.c: Likewise. * sysdeps/ieee754/dbl-64/s_tan.c: Likewise. * sysdeps/ieee754/dbl-64/sincos32.c: Likewise. * sysdeps/ieee754/dbl-64/slowexp.c: Likewise. * sysdeps/ieee754/dbl-64/slowpow.c: Likewise. * sysdeps/gnu/netinet/udp.h: Added BSD copying permission notice * sysdeps/vax/__longjmp.c: Likewise. * sysdeps/vax/setjmp.c: Likewise. * libio/filedoalloc.c: Fixed BSD copying permission notice to remove advertising clause * sysdeps/vax/htonl.s: Likewise. * sysdeps/vax/htons.s: Likewise. * libio/wfiledoalloc.c: Likewise. * stdlib/random.c: Likewise. * stdlib/random_r.c: Likewise. * sysdeps/mach/sys/reboot.h: Likewise. * inet/getnameinfo.c: Deleted advertising clause from Inner Net License * sysdeps/posix/getaddrinfo.c: Likewise. * sunrpc/des_impl.c: Updated license permission notice to Lesser GPL and corrected pointer to point to the correct license.
782 lines
21 KiB
ArmAsm
782 lines
21 KiB
ArmAsm
.file "expf.s"
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// Copyright (C) 2000, 2001, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2/2/2000 by John Harrison, Ted Kubaska, Bob Norin, Shane Story,
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// and Ping Tak Peter Tang of the Computational Software Lab, Intel Corporation.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://developer.intel.com/opensource.
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// History
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//==============================================================
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// 4/04/00 Unwind update
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// 4/04/00 Unwind support added
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// 8/15/00 Bundle added after call to __libm_error_support to properly
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// set [the previously overwritten] GR_Parameter_RESULT.
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// 8/21/00 Improvements to save 2 cycles on main path, and shorten x=0 case
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// 12/07/00 Widen main path, shorten x=inf, nan paths
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//
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#include "libm_support.h"
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// Assembly macros
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//==============================================================
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// integer registers used
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exp_GR_0x0f = r33
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exp_GR_0xf0 = r34
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EXP_AD_P_1 = r36
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EXP_AD_P_2 = r37
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EXP_AD_T1 = r38
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EXP_AD_T2 = r39
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exp_GR_Mint = r40
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exp_GR_Mint_p_128 = r41
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exp_GR_Ind1 = r42
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EXP_AD_M1 = r43
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exp_GR_Ind2 = r44
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EXP_AD_M2 = r45
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exp_GR_min_oflow = r46
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exp_GR_max_zero = r47
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exp_GR_max_norm = r48
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exp_GR_max_uflow = r49
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exp_GR_min_norm = r50
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exp_GR_17ones = r51
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exp_GR_gt_ln = r52
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exp_GR_T2_size = r53
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exp_GR_17ones_m1 = r56
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exp_GR_one = r57
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GR_SAVE_B0 = r53
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GR_SAVE_PFS = r55
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GR_SAVE_GP = r54
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GR_Parameter_X = r59
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GR_Parameter_Y = r60
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GR_Parameter_RESULT = r61
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GR_Parameter_TAG = r62
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FR_X = f10
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FR_Y = f1
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FR_RESULT = f8
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// floating point registers used
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EXP_MIN_SGL_OFLOW_ARG = f11
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EXP_MAX_SGL_ZERO_ARG = f12
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EXP_MAX_SGL_NORM_ARG = f13
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EXP_MAX_SGL_UFLOW_ARG = f14
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EXP_MIN_SGL_NORM_ARG = f15
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exp_coeff_P5 = f32
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exp_coeff_P6 = f33
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exp_coeff_P3 = f34
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exp_coeff_P4 = f35
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exp_coeff_P1 = f36
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exp_coeff_P2 = f37
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exp_Mx = f38
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exp_Mfloat = f39
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exp_R = f40
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exp_P1 = f41
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exp_P2 = f42
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exp_P3 = f43
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exp_Rsq = f44
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exp_R4 = f45
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exp_P4 = f46
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exp_P5 = f47
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exp_P6 = f48
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exp_P7 = f49
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exp_T1 = f50
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exp_T2 = f51
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exp_T = f52
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exp_A = f53
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exp_norm_f8 = f54
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exp_wre_urm_f8 = f55
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exp_ftz_urm_f8 = f56
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exp_gt_pln = f57
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#ifdef _LIBC
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.rodata
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#else
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.data
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#endif
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.align 16
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exp_coeff_1_table:
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ASM_TYPE_DIRECTIVE(exp_coeff_1_table,@object)
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data8 0x3F56F35FDE4F8563 // p5
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data8 0x3F2A378BEFECCFDD // p6
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data8 0x3FE00000258C581D // p1
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data8 0x3FC555557AE7B3D4 // p2
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ASM_SIZE_DIRECTIVE(exp_coeff_1_table)
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exp_coeff_2_table:
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ASM_TYPE_DIRECTIVE(exp_coeff_2_table,@object)
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data8 0x3FA5551BB6592FAE // p3
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data8 0x3F8110E8EBFFD485 // p4
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ASM_SIZE_DIRECTIVE(exp_coeff_2_table)
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exp_T2_table:
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ASM_TYPE_DIRECTIVE(exp_T2_table,@object)
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data8 0xa175cf9cd7d85844 , 0x00003f46 // exp(-128)
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data8 0xdb7279415a1f9eed , 0x00003f47 // exp(-127)
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data8 0x95213b242bd8ca5f , 0x00003f49 // exp(-126)
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data8 0xcab03c968c989f83 , 0x00003f4a // exp(-125)
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data8 0x89bdb674702961ad , 0x00003f4c // exp(-124)
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data8 0xbb35a2eec278be35 , 0x00003f4d // exp(-123)
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data8 0xfe71b17f373e7e7a , 0x00003f4e // exp(-122)
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data8 0xace9a6ec52a39b63 , 0x00003f50 // exp(-121)
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data8 0xeb03423fe393cf1c , 0x00003f51 // exp(-120)
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data8 0x9fb52c5bcaef1693 , 0x00003f53 // exp(-119)
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data8 0xd910b6377ed60bf1 , 0x00003f54 // exp(-118)
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data8 0x9382dad8a9fdbfe4 , 0x00003f56 // exp(-117)
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data8 0xc87d0a84dea869a3 , 0x00003f57 // exp(-116)
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data8 0x883efb4c6d1087b0 , 0x00003f59 // exp(-115)
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data8 0xb92d7373dce9a502 , 0x00003f5a // exp(-114)
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data8 0xfbaeb020577fb0cb , 0x00003f5b // exp(-113)
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ASM_SIZE_DIRECTIVE(exp_T2_table)
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exp_T1_table:
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ASM_TYPE_DIRECTIVE(exp_T1_table,@object)
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data8 0x8000000000000000 , 0x00003fff // exp(16 * 0)
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data8 0x87975e8540010249 , 0x00004016 // exp(16 * 1)
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data8 0x8fa1fe625b3163ec , 0x0000402d // exp(16 * 2)
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data8 0x9826b576512a59d7 , 0x00004044 // exp(16 * 3)
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data8 0xa12cc167acbe6902 , 0x0000405b // exp(16 * 4)
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data8 0xaabbcdcc279f59e4 , 0x00004072 // exp(16 * 5)
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data8 0xb4dbfaadc045d16f , 0x00004089 // exp(16 * 6)
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data8 0xbf95e372ccdbf146 , 0x000040a0 // exp(16 * 7)
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data8 0xcaf2a62eea10bbfb , 0x000040b7 // exp(16 * 8)
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data8 0xd6fbeb62fddbd340 , 0x000040ce // exp(16 * 9)
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data8 0xe3bbee32e4a440ea , 0x000040e5 // exp(16 * 10)
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data8 0xf13d8517c34199a8 , 0x000040fc // exp(16 * 11)
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data8 0xff8c2b166241eedd , 0x00004113 // exp(16 * 12)
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data8 0x875a04c0b38d6129 , 0x0000412b // exp(16 * 13)
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data8 0x8f610127db6774d7 , 0x00004142 // exp(16 * 14)
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data8 0x97e1dd87e5c20bb6 , 0x00004159 // exp(16 * 15)
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ASM_SIZE_DIRECTIVE(exp_T1_table)
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// Argument Reduction
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// exp_Mx = (int)f8 ==> The value of f8 rounded to int is placed into the
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// significand of exp_Mx as a two's
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// complement number.
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// Later we want to have exp_Mx in a general register. Do this with a getf.sig
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// and call the general register exp_GR_Mint
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// exp_Mfloat = (float)(int)f8 ==> the two's complement number in
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// significand of exp_Mx is turned
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// into a floating point number.
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// R = 1 - exp_Mfloat ==> reduced argument
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// Core Approximation
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// Calculate a series in R
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// R * p6 + p5
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// R * p4 + p3
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// R * p2 + p1
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// R^2
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// R^4
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// R^2(R * p6 + p5) + (R * p4 + p3)
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// R^2(R * p2 + p1)
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// R^4(R^2(R * p6 + p5) + (R * p4 + p3)) + (R^2(R * p2 + p1))
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// R + 1
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// exp(R) = (1 + R) + R^4(R^2(R * p6 + p5) + (R * p4 + p3)) + (R^2(R * p2 + p1))
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// exp(R) = 1 + R + R^2 * p1 + R^3 * p2 + R^4 * p3 + R^5 * p4 + R^6 * p5 + R^7 * p6
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// Reconstruction
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// signficand of exp_Mx is two's complement,
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// -103 < x < 89
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// The smallest single denormal is 2^-149 = ssdn
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// For e^x = ssdn
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// x = log(ssdn) = -103.279
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// But with rounding result goes to ssdn until -103.972079
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// The largest single normal is 1.<23 1's> 2^126 ~ 2^127 = lsn
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// For e^x = lsn
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// x = log(lsn) = 88.7228
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//
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// expf overflows when x > 42b17218 = 88.7228
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// expf returns largest single denormal when x = c2aeac50
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// expf goes to zero when x < c2cff1b5
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// Consider range of 8-bit two's complement, -128 ---> 127
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// Add 128; range becomes 0 ---> 255
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// The number (=i) in 0 ---> 255 is used as offset into two tables.
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// i = abcd efgh = abcd * 16 + efgh = i1 * 16 + i2
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// i1 = (exp_GR_Mint + 128) & 0xf0 (show 0xf0 as -0x10 to avoid assembler error)
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// (The immediate in the AND is an 8-bit two's complement)
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// i1 = i1 + start of T1 table (EXP_AD_T1)
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// Note that the entries in T1 are double-extended numbers on 16-byte boundaries
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// and that i1 is already shifted left by 16 after the AND.
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// i2 must be shifted left by 4 before adding to the start of the table.
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// i2 = ((exp_GR_Mint + 128) & 0x0f) << 4
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// i2 = i2 + start of T2 table (EXP_AD_T2)
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// T = T1 * T2
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// A = T * (1 + R)
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// answer = T * (R^2 * p1 + R^3 * p2 + R^4 * p3 + R^5 * p4 + R^6 * p5 + R^7 * p6) +
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// T * (1 + R)
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// = T * exp(R)
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.global expf#
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.section .text
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.proc expf#
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.align 32
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expf:
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#ifdef _LIBC
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.global __ieee754_expf#
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__ieee754_expf:
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#endif
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{ .mfi
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alloc r32 = ar.pfs,1,26,4,0
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fcvt.fx.s1 exp_Mx = f8
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mov exp_GR_17ones = 0x1FFFF
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}
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{ .mlx
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addl EXP_AD_P_1 = @ltoff(exp_coeff_1_table),gp
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movl exp_GR_min_oflow = 0x42b17218
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}
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;;
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// Fnorm done to take any enabled faults
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{ .mfi
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ld8 EXP_AD_P_1 = [EXP_AD_P_1]
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fclass.m p6,p0 = f8, 0x07 //@zero
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nop.i 999
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}
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{ .mfi
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add exp_GR_max_norm = -1, exp_GR_min_oflow // 0x42b17217
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fnorm exp_norm_f8 = f8
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nop.i 999
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}
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;;
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{ .mfi
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setf.s EXP_MIN_SGL_OFLOW_ARG = exp_GR_min_oflow // 0x42b17218
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fclass.m p7,p0 = f8, 0x22 // Test for x=-inf
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mov exp_GR_0xf0 = 0x0f0
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}
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{ .mlx
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setf.s EXP_MAX_SGL_NORM_ARG = exp_GR_max_norm
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|
movl exp_GR_max_zero = 0xc2cff1b5
|
|
}
|
|
;;
|
|
|
|
|
|
{ .mlx
|
|
mov exp_GR_0x0f = 0x00f
|
|
movl exp_GR_max_uflow = 0xc2aeac50
|
|
}
|
|
{ .mfb
|
|
nop.m 999
|
|
(p6) fma.s f8 = f1,f1,f0
|
|
(p6) br.ret.spnt b0 // quick exit for x=0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
setf.s EXP_MAX_SGL_ZERO_ARG = exp_GR_max_zero
|
|
fclass.m p8,p0 = f8, 0x21 // Test for x=+inf
|
|
adds exp_GR_min_norm = 1, exp_GR_max_uflow // 0xc2aeac51
|
|
}
|
|
{ .mfb
|
|
ldfpd exp_coeff_P5,exp_coeff_P6 = [EXP_AD_P_1],16
|
|
(p7) fma.s f8 = f0,f0,f0
|
|
(p7) br.ret.spnt b0 // quick exit for x=-inf
|
|
}
|
|
;;
|
|
|
|
{ .mmf
|
|
ldfpd exp_coeff_P1,exp_coeff_P2 = [EXP_AD_P_1],16
|
|
setf.s EXP_MAX_SGL_UFLOW_ARG = exp_GR_max_uflow
|
|
fclass.m p9,p0 = f8, 0xc3 // Test for x=nan
|
|
}
|
|
;;
|
|
|
|
{ .mmb
|
|
ldfpd exp_coeff_P3,exp_coeff_P4 = [EXP_AD_P_1],16
|
|
setf.s EXP_MIN_SGL_NORM_ARG = exp_GR_min_norm
|
|
(p8) br.ret.spnt b0 // quick exit for x=+inf
|
|
}
|
|
;;
|
|
|
|
// EXP_AD_P_1 now points to exp_T2_table
|
|
{ .mfi
|
|
mov exp_GR_T2_size = 0x100
|
|
fcvt.xf exp_Mfloat = exp_Mx
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
getf.sig exp_GR_Mint = exp_Mx
|
|
(p9) fmerge.s f8 = exp_norm_f8, exp_norm_f8
|
|
(p9) br.ret.spnt b0 // quick exit for x=nan
|
|
}
|
|
;;
|
|
|
|
{ .mmi
|
|
nop.m 999
|
|
mov EXP_AD_T2 = EXP_AD_P_1
|
|
add EXP_AD_T1 = exp_GR_T2_size,EXP_AD_P_1 ;;
|
|
}
|
|
|
|
|
|
{ .mmi
|
|
adds exp_GR_Mint_p_128 = 0x80,exp_GR_Mint ;;
|
|
and exp_GR_Ind1 = exp_GR_Mint_p_128, exp_GR_0xf0
|
|
and exp_GR_Ind2 = exp_GR_Mint_p_128, exp_GR_0x0f ;;
|
|
}
|
|
|
|
// Divide arguments into the following categories:
|
|
// Certain Underflow/zero p11 - -inf < x <= MAX_SGL_ZERO_ARG
|
|
// Certain Underflow p12 - MAX_SGL_ZERO_ARG < x <= MAX_SGL_UFLOW_ARG
|
|
// Possible Underflow p13 - MAX_SGL_UFLOW_ARG < x < MIN_SGL_NORM_ARG
|
|
// Certain Safe - MIN_SGL_NORM_ARG <= x <= MAX_SGL_NORM_ARG
|
|
// Possible Overflow p14 - MAX_SGL_NORM_ARG < x < MIN_SGL_OFLOW_ARG
|
|
// Certain Overflow p15 - MIN_SGL_OFLOW_ARG <= x < +inf
|
|
//
|
|
// If the input is really a single arg, then there will never be "Possible
|
|
// Underflow" or "Possible Overflow" arguments.
|
|
//
|
|
|
|
{ .mfi
|
|
add EXP_AD_M1 = exp_GR_Ind1,EXP_AD_T1
|
|
fcmp.ge.s1 p15,p14 = exp_norm_f8,EXP_MIN_SGL_OFLOW_ARG
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
shladd EXP_AD_M2 = exp_GR_Ind2,4,EXP_AD_T2
|
|
fms.s1 exp_R = f1,f8,exp_Mfloat
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{ .mfi
|
|
ldfe exp_T1 = [EXP_AD_M1]
|
|
fcmp.le.s1 p11,p12 = exp_norm_f8,EXP_MAX_SGL_ZERO_ARG
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{ .mfb
|
|
ldfe exp_T2 = [EXP_AD_M2]
|
|
(p14) fcmp.gt.s1 p14,p0 = exp_norm_f8,EXP_MAX_SGL_NORM_ARG
|
|
(p15) br.cond.spnt L(EXP_CERTAIN_OVERFLOW) ;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
(p12) fcmp.le.s1 p12,p0 = exp_norm_f8,EXP_MAX_SGL_UFLOW_ARG
|
|
(p11) br.cond.spnt L(EXP_CERTAIN_UNDERFLOW_ZERO)
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
(p13) fcmp.lt.s1 p13,p0 = exp_norm_f8,EXP_MIN_SGL_NORM_ARG
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_Rsq = exp_R,exp_R,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_P3 = exp_R,exp_coeff_P2,exp_coeff_P1
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_P1 = exp_R,exp_coeff_P6,exp_coeff_P5
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_P2 = exp_R,exp_coeff_P4,exp_coeff_P3
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_P7 = f1,exp_R,f1
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_P5 = exp_Rsq,exp_P3,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_R4 = exp_Rsq,exp_Rsq,f0
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_T = exp_T1,exp_T2,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_P4 = exp_Rsq,exp_P1,exp_P2
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_A = exp_T,exp_P7,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s1 exp_P6 = exp_R4,exp_P4,exp_P5
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .bbb
|
|
(p12) br.cond.spnt L(EXP_CERTAIN_UNDERFLOW)
|
|
(p13) br.cond.spnt L(EXP_POSSIBLE_UNDERFLOW)
|
|
(p14) br.cond.spnt L(EXP_POSSIBLE_OVERFLOW)
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
fma.s f8 = exp_T,exp_P6,exp_A
|
|
br.ret.sptk b0
|
|
}
|
|
;;
|
|
|
|
L(EXP_POSSIBLE_OVERFLOW):
|
|
|
|
// We got an answer. EXP_MAX_SGL_NORM_ARG < x < EXP_MIN_SGL_OFLOW_ARG
|
|
// overflow is a possibility, not a certainty
|
|
// Set wre in s2 and perform the last operation with s2
|
|
|
|
// We define an overflow when the answer with
|
|
// WRE set
|
|
// user-defined rounding mode
|
|
// is lsn +1
|
|
|
|
// Is the exponent 1 more than the largest single?
|
|
// If so, go to ERROR RETURN, else (no overflow) get the answer and
|
|
// leave.
|
|
|
|
// Largest single is FE (biased single)
|
|
// FE - 7F + FFFF = 1007E
|
|
|
|
// Create + largest_single_plus_ulp
|
|
// Create - largest_single_plus_ulp
|
|
|
|
// Calculate answer with WRE set.
|
|
|
|
// Cases when answer is lsn+1 are as follows:
|
|
|
|
// midpoint
|
|
// |
|
|
// lsn | lsn+1
|
|
// --+----------|----------+------------
|
|
// |
|
|
// +inf +inf -inf
|
|
// RN RN
|
|
// RZ
|
|
// exp_gt_pln contains the floating point number lsn+1.
|
|
// The setf.exp puts 0x1007f in the exponent and 0x800... in the significand.
|
|
|
|
// If the answer is >= lsn+1, we have overflowed.
|
|
// Then p6 is TRUE. Set the overflow tag, save input in FR_X,
|
|
// do the final calculation for IEEE result, and branch to error return.
|
|
|
|
{ .mfi
|
|
mov exp_GR_gt_ln = 0x1007F
|
|
fsetc.s2 0x7F,0x42
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
setf.exp exp_gt_pln = exp_GR_gt_ln
|
|
fma.s.s2 exp_wre_urm_f8 = exp_T, exp_P6, exp_A
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fsetc.s2 0x7F,0x40
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fcmp.ge.unc.s1 p6, p0 = exp_wre_urm_f8, exp_gt_pln
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
nop.f 999
|
|
(p6) br.cond.spnt L(EXP_CERTAIN_OVERFLOW) // Branch if really overflow
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
fma.s f8 = exp_T, exp_P6, exp_A
|
|
br.ret.sptk b0 // Exit if really no overflow
|
|
}
|
|
;;
|
|
|
|
L(EXP_CERTAIN_OVERFLOW):
|
|
{ .mmi
|
|
sub exp_GR_17ones_m1 = exp_GR_17ones, r0, 1 ;;
|
|
setf.exp f9 = exp_GR_17ones_m1
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fmerge.s FR_X = f8,f8
|
|
nop.i 999
|
|
}
|
|
{ .mfb
|
|
mov GR_Parameter_TAG = 16
|
|
fma.s FR_RESULT = f9, f9, f0 // Set I,O and +INF result
|
|
br.cond.sptk __libm_error_region ;;
|
|
}
|
|
|
|
L(EXP_POSSIBLE_UNDERFLOW):
|
|
|
|
// We got an answer. EXP_MAX_SGL_UFLOW_ARG < x < EXP_MIN_SGL_NORM_ARG
|
|
// underflow is a possibility, not a certainty
|
|
|
|
// We define an underflow when the answer with
|
|
// ftz set
|
|
// is zero (tiny numbers become zero)
|
|
|
|
// Notice (from below) that if we have an unlimited exponent range,
|
|
// then there is an extra machine number E between the largest denormal and
|
|
// the smallest normal.
|
|
|
|
// So if with unbounded exponent we round to E or below, then we are
|
|
// tiny and underflow has occurred.
|
|
|
|
// But notice that you can be in a situation where we are tiny, namely
|
|
// rounded to E, but when the exponent is bounded we round to smallest
|
|
// normal. So the answer can be the smallest normal with underflow.
|
|
|
|
// E
|
|
// -----+--------------------+--------------------+-----
|
|
// | | |
|
|
// 1.1...10 2^-7f 1.1...11 2^-7f 1.0...00 2^-7e
|
|
// 0.1...11 2^-7e (biased, 1)
|
|
// largest dn smallest normal
|
|
|
|
// If the answer is = 0, we have underflowed.
|
|
// Then p6 is TRUE. Set the underflow tag, save input in FR_X,
|
|
// do the final calculation for IEEE result, and branch to error return.
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fsetc.s2 0x7F,0x41
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.s.s2 exp_ftz_urm_f8 = exp_T, exp_P6, exp_A
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fsetc.s2 0x7F,0x40
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fcmp.eq.unc.s1 p6, p0 = exp_ftz_urm_f8, f0
|
|
nop.i 999
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
nop.f 999
|
|
(p6) br.cond.spnt L(EXP_CERTAIN_UNDERFLOW) // Branch if really underflow
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
fma.s f8 = exp_T, exp_P6, exp_A
|
|
br.ret.sptk b0 // Exit if really no underflow
|
|
}
|
|
;;
|
|
|
|
L(EXP_CERTAIN_UNDERFLOW):
|
|
{ .mfi
|
|
nop.m 999
|
|
fmerge.s FR_X = f8,f8
|
|
nop.i 999
|
|
}
|
|
{ .mfb
|
|
mov GR_Parameter_TAG = 17
|
|
fma.s FR_RESULT = exp_T, exp_P6, exp_A // Set I,U and tiny result
|
|
br.cond.sptk __libm_error_region ;;
|
|
}
|
|
|
|
L(EXP_CERTAIN_UNDERFLOW_ZERO):
|
|
{ .mmi
|
|
mov exp_GR_one = 1 ;;
|
|
setf.exp f9 = exp_GR_one
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fmerge.s FR_X = f8,f8
|
|
nop.i 999
|
|
}
|
|
{ .mfb
|
|
mov GR_Parameter_TAG = 17
|
|
fma.s FR_RESULT = f9, f9, f0 // Set I,U and tiny (+0.0) result
|
|
br.cond.sptk __libm_error_region ;;
|
|
}
|
|
|
|
.endp expf
|
|
ASM_SIZE_DIRECTIVE(expf)
|
|
|
|
|
|
.proc __libm_error_region
|
|
__libm_error_region:
|
|
.prologue
|
|
{ .mfi
|
|
add GR_Parameter_Y=-32,sp // Parameter 2 value
|
|
nop.f 999
|
|
.save ar.pfs,GR_SAVE_PFS
|
|
mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
|
|
}
|
|
{ .mfi
|
|
.fframe 64
|
|
add sp=-64,sp // Create new stack
|
|
nop.f 0
|
|
mov GR_SAVE_GP=gp // Save gp
|
|
};;
|
|
{ .mmi
|
|
stfs [GR_Parameter_Y] = FR_Y,16 // Store Parameter 2 on stack
|
|
add GR_Parameter_X = 16,sp // Parameter 1 address
|
|
.save b0, GR_SAVE_B0
|
|
mov GR_SAVE_B0=b0 // Save b0
|
|
};;
|
|
.body
|
|
{ .mfi
|
|
stfs [GR_Parameter_X] = FR_X // Store Parameter 1 on stack
|
|
nop.f 0
|
|
add GR_Parameter_RESULT = 0,GR_Parameter_Y // Parameter 3 address
|
|
}
|
|
{ .mib
|
|
stfs [GR_Parameter_Y] = FR_RESULT // Store Parameter 3 on stack
|
|
add GR_Parameter_Y = -16,GR_Parameter_Y
|
|
br.call.sptk b0=__libm_error_support# // Call error handling function
|
|
};;
|
|
|
|
{ .mmi
|
|
nop.m 0
|
|
nop.m 0
|
|
add GR_Parameter_RESULT = 48,sp
|
|
};;
|
|
|
|
{ .mmi
|
|
ldfs f8 = [GR_Parameter_RESULT] // Get return result off stack
|
|
.restore sp
|
|
add sp = 64,sp // Restore stack pointer
|
|
mov b0 = GR_SAVE_B0 // Restore return address
|
|
};;
|
|
{ .mib
|
|
mov gp = GR_SAVE_GP // Restore gp
|
|
mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
|
|
br.ret.sptk b0 // Return
|
|
};;
|
|
|
|
.endp __libm_error_region
|
|
ASM_SIZE_DIRECTIVE(__libm_error_region)
|
|
|
|
|
|
.type __libm_error_support#,@function
|
|
.global __libm_error_support#
|