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4372980f58
I've moved the TILE-Gx and TILEPro ports to the main sysdeps hierarchy,
along with the linux-generic ports infrastructure. Beyond the README
update, the move was just
git mv ports/sysdeps/tile sysdeps/tile
git mv ports/sysdeps/unix/sysv/linux/tile \
sysdeps/unix/sysv/linux/tile
git mv ports/sysdeps/unix/sysv/linux/generic \
sysdeps/unix/sysv/linux/generic
I updated the relevant ChangeLogs along the lines of the ARM move
in commit c6bfe5c4d7 and tested the 64-bit tilegx build to confirm that
there were no changes in "objdump -dr" output in the shared objects.
153 lines
4.9 KiB
ArmAsm
153 lines
4.9 KiB
ArmAsm
/* Copyright (C) 2011-2014 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Chris Metcalf <cmetcalf@tilera.com>, 2011.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <tls.h>
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#include <bits/wordsize.h>
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#if __WORDSIZE == 64
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#define LOG_SIZEOF_DTV_T 4
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#else
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#define LOG_SIZEOF_DTV_T 3
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#endif
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/* On entry, r0 points to two words, the module and the offset.
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On return, r0 holds the pointer to the relevant TLS memory.
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Only registers r25..r29 are clobbered by the call. */
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.text
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ENTRY (__tls_get_addr)
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{
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lnk r25
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ADDI_PTR r27, tp, DTV_OFFSET
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}
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.Llnk:
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#ifdef __tilegx__
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{
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LD_PTR r27, r27 /* r27 = THREAD_DTV() */
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moveli r26, hw1_last(_rtld_local + TLS_GENERATION_OFFSET - .Llnk)
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}
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shl16insli r26, r26, hw0(_rtld_local + TLS_GENERATION_OFFSET - .Llnk)
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{
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ADD_PTR r25, r25, r26
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LD_PTR r26, r0 /* r26 = ti_module */
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}
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#else
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{
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LD_PTR r27, r27 /* r27 = THREAD_DTV() */
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addli r25, r25, lo16(_rtld_local + TLS_GENERATION_OFFSET - .Llnk)
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}
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{
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auli r25, r25, ha16(_rtld_local + TLS_GENERATION_OFFSET - .Llnk)
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LD_PTR r26, r0 /* r26 = ti_module */
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}
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#endif
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LD_PTR r25, r25 /* r25 = DL(dl_tls_generation) */
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{
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LD_PTR r28, r27 /* r28 = THREAD_DTV()->counter */
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ADDI_PTR r29, r0, __SIZEOF_POINTER__
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}
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{
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LD_PTR r29, r29 /* r29 = ti_offset */
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CMPEQ r25, r28, r25 /* r25 nonzero if generation OK */
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shli r28, r26, LOG_SIZEOF_DTV_T /* byte index into dtv array */
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}
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{
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BEQZ r25, .Lslowpath
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CMPEQI r25, r26, -1 /* r25 nonzero if ti_module invalid */
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}
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{
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BNEZ r25, .Lslowpath
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ADD_PTR r28, r28, r27 /* pointer into module array */
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}
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LD_PTR r26, r28 /* r26 = module TLS pointer */
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CMPEQI r25, r26, -1 /* check r26 == TLS_DTV_UNALLOCATED */
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BNEZ r25, .Lslowpath
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{
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ADD_PTR r0, r26, r29
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jrp lr
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}
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.Lslowpath:
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{
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ST sp, lr
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ADDLI_PTR r29, sp, - (25 * REGSIZE)
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}
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cfi_offset (lr, 0)
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{
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ST r29, sp
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ADDLI_PTR sp, sp, - (26 * REGSIZE)
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}
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cfi_def_cfa_offset (26 * REGSIZE)
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ADDI_PTR r29, sp, (2 * REGSIZE)
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{ ST r29, r1; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r2; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r3; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r4; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r5; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r6; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r7; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r8; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r9; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r10; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r11; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r12; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r13; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r14; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r15; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r16; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r17; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r18; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r19; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r20; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r21; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r22; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r23; ADDI_PTR r29, r29, REGSIZE }
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{ ST r29, r24; ADDI_PTR r29, r29, REGSIZE }
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.hidden __tls_get_addr_slow
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jal __tls_get_addr_slow
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ADDI_PTR r29, sp, (2 * REGSIZE)
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{ LD r1, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r2, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r3, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r4, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r5, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r6, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r7, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r8, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r9, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r10, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r11, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r12, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r13, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r14, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r15, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r16, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r17, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r18, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r19, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r20, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r21, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r22, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r23, r29; ADDI_PTR r29, r29, REGSIZE }
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{ LD r24, r29; ADDLI_PTR sp, sp, (26 * REGSIZE) }
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cfi_def_cfa_offset (0)
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LD lr, sp
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jrp lr
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END (__tls_get_addr)
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