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81cb7a0b2b
This semi-mechanical patch removes all uses and definitions of the
sfi_breg, sfi_pld, and sfi_sp macros from various ARM-specific
assembly files. These were only used by NaCl.
* sysdeps/arm/sysdep.h
(ARM_SFI_MACROS, sfi_breg, sfi_pld, sfi_sp): Delete definitions.
* sysdeps/arm/__longjmp.S, sysdeps/arm/add_n.S
* sysdeps/arm/addmul_1.S, sysdeps/arm/arm-mcount.S
* sysdeps/arm/armv6/rawmemchr.S, sysdeps/arm/armv6/strchr.S
* sysdeps/arm/armv6/strcpy.S, sysdeps/arm/armv6/strlen.S
* sysdeps/arm/armv6/strrchr.S, sysdeps/arm/armv6t2/memchr.S
* sysdeps/arm/armv6t2/strlen.S
* sysdeps/arm/armv7/multiarch/memcpy_impl.S
* sysdeps/arm/armv7/strcmp.S, sysdeps/arm/dl-tlsdesc.S
* sysdeps/arm/memcpy.S, sysdeps/arm/memmove.S
* sysdeps/arm/memset.S, sysdeps/arm/setjmp.S
* sysdeps/arm/strlen.S, sysdeps/arm/submul_1.S:
Remove all uses of sfi_breg, sfi_pld, and sfi_sp.
68 lines
1.8 KiB
ArmAsm
68 lines
1.8 KiB
ArmAsm
/* mpn_addmul_1 -- multiply and accumulate bignums.
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Copyright (C) 2013-2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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.syntax unified
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.text
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@ cycles/limb
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@ StrongArm ?
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@ Cortex-A8 ?
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@ Cortex-A9 ?
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@ Cortex-A15 4
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/* mp_limb_t mpn_addmul_1(res_ptr, src1_ptr, size, s2_limb) */
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ENTRY (__mpn_addmul_1)
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push { r4, r5, r6, r7 }
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cfi_adjust_cfa_offset (16)
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cfi_rel_offset (r4, 0)
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cfi_rel_offset (r5, 4)
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cfi_rel_offset (r6, 8)
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cfi_rel_offset (r7, 12)
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ldr r6, [r1], #4
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ldr r5, [r0]
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mov r4, #0 /* init carry in */
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b 1f
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0:
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ldr r6, [r1], #4 /* load next ul */
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adds r7, r4, r5 /* (out, c) = cl + lpl */
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ldr r5, [r0, #4] /* load next rl */
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adc r4, ip, #0 /* cl = hpl + c */
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str r7, [r0], #4
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1:
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mov ip, #0 /* zero-extend rl */
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umlal r5, ip, r6, r3 /* (hpl, lpl) = ul * vl + rl */
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subs r2, r2, #1
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bne 0b
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adds r4, r4, r5 /* (out, c) = cl + llpl */
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str r4, [r0]
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adc r0, ip, #0 /* return hpl + c */
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pop { r4, r5, r6, r7 }
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cfi_adjust_cfa_offset (-16)
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cfi_restore (r4)
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cfi_restore (r5)
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cfi_restore (r6)
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cfi_restore (r7)
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DO_RET (lr)
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END (__mpn_addmul_1)
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