glibc/ports/sysdeps/mips/fpu/fedisblxcpt.c
Maciej W. Rozycki b72ca61b71 MIPS: Correct the handling of reserved FCSR bits
Reserved bits in the Floating-Point Control and Status Register (FCSR)
should not be implicitly cleared by fedisableexcept or feenableexcept,
there is no reason to.  Among these are the 8 condition codes and one of
the two bits reserved for architecture implementers (bits #22 & #21).

As to the latter, there is no reason to treat any of them as reserved
either, they should be user controllable and settable via __fpu_control
override as the user sees fit.  For example in processors implemented by
MIPS Technologies, such as the 5Kf or the 24Kf, these bits are used to
change the treatment of denormalised operands and tiny results: bit #22
is Flush Override (FO) and bit #21 is Flush to Nearest (FN).  They cause
non-IEEE-compliant behaviour, but some programs may have a use for such
modes of operation; the library should not obstruct such use just as it
does not for the architectural Flush to Zero (FS) bit (bit #24).

Therefore the change adjusts the reserved mask accordingly and also
documents the distinction between bits 22:21 and 20:18.
2013-08-22 17:55:17 +01:00

41 lines
1.2 KiB
C

/* Disable floating-point exceptions.
Copyright (C) 2000-2013 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Andreas Jaeger <aj@suse.de>, 2000.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library. If not, see
<http://www.gnu.org/licenses/>. */
#include <fenv.h>
#include <fenv_libc.h>
#include <fpu_control.h>
int
fedisableexcept (int excepts)
{
unsigned int new_exc, old_exc;
/* Get the current control word. */
_FPU_GETCW (new_exc);
old_exc = (new_exc & ENABLE_MASK) >> ENABLE_SHIFT;
excepts &= FE_ALL_EXCEPT;
new_exc &= ~(excepts << ENABLE_SHIFT);
_FPU_SETCW (new_exc);
return old_exc;
}