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7ebba91361
Since VZEROUPPER triggers RTM abort while VZEROALL won't, select AVX optimized string/memory functions with xtest jz 1f vzeroall ret 1: vzeroupper ret at function exit on processors with usable RTM, but without 256-bit EVEX instructions to avoid VZEROUPPER inside a transactionally executing RTM region.
361 lines
6.8 KiB
ArmAsm
361 lines
6.8 KiB
ArmAsm
/* memrchr optimized with AVX2.
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Copyright (C) 2017-2021 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#if IS_IN (libc)
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# include <sysdep.h>
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# ifndef MEMRCHR
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# define MEMRCHR __memrchr_avx2
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# endif
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# ifndef VZEROUPPER
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# define VZEROUPPER vzeroupper
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# endif
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# ifndef SECTION
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# define SECTION(p) p##.avx
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# endif
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# define VEC_SIZE 32
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.section SECTION(.text),"ax",@progbits
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ENTRY (MEMRCHR)
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/* Broadcast CHAR to YMM0. */
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vmovd %esi, %xmm0
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vpbroadcastb %xmm0, %ymm0
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sub $VEC_SIZE, %RDX_LP
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jbe L(last_vec_or_less)
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add %RDX_LP, %RDI_LP
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/* Check the last VEC_SIZE bytes. */
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vpcmpeqb (%rdi), %ymm0, %ymm1
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vpmovmskb %ymm1, %eax
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testl %eax, %eax
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jnz L(last_vec_x0)
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subq $(VEC_SIZE * 4), %rdi
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movl %edi, %ecx
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andl $(VEC_SIZE - 1), %ecx
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jz L(aligned_more)
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/* Align data for aligned loads in the loop. */
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addq $VEC_SIZE, %rdi
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addq $VEC_SIZE, %rdx
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andq $-VEC_SIZE, %rdi
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subq %rcx, %rdx
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.p2align 4
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L(aligned_more):
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subq $(VEC_SIZE * 4), %rdx
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jbe L(last_4x_vec_or_less)
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/* Check the last 4 * VEC_SIZE. Only one VEC_SIZE at a time
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since data is only aligned to VEC_SIZE. */
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vpcmpeqb (VEC_SIZE * 3)(%rdi), %ymm0, %ymm1
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vpmovmskb %ymm1, %eax
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testl %eax, %eax
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jnz L(last_vec_x3)
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vpcmpeqb (VEC_SIZE * 2)(%rdi), %ymm0, %ymm2
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vpmovmskb %ymm2, %eax
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testl %eax, %eax
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jnz L(last_vec_x2)
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vpcmpeqb VEC_SIZE(%rdi), %ymm0, %ymm3
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jnz L(last_vec_x1)
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vpcmpeqb (%rdi), %ymm0, %ymm4
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vpmovmskb %ymm4, %eax
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testl %eax, %eax
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jnz L(last_vec_x0)
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/* Align data to 4 * VEC_SIZE for loop with fewer branches.
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There are some overlaps with above if data isn't aligned
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to 4 * VEC_SIZE. */
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movl %edi, %ecx
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andl $(VEC_SIZE * 4 - 1), %ecx
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jz L(loop_4x_vec)
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addq $(VEC_SIZE * 4), %rdi
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addq $(VEC_SIZE * 4), %rdx
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andq $-(VEC_SIZE * 4), %rdi
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subq %rcx, %rdx
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.p2align 4
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L(loop_4x_vec):
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/* Compare 4 * VEC at a time forward. */
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subq $(VEC_SIZE * 4), %rdi
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subq $(VEC_SIZE * 4), %rdx
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jbe L(last_4x_vec_or_less)
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vmovdqa (%rdi), %ymm1
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vmovdqa VEC_SIZE(%rdi), %ymm2
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vmovdqa (VEC_SIZE * 2)(%rdi), %ymm3
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vmovdqa (VEC_SIZE * 3)(%rdi), %ymm4
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vpcmpeqb %ymm1, %ymm0, %ymm1
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vpcmpeqb %ymm2, %ymm0, %ymm2
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vpcmpeqb %ymm3, %ymm0, %ymm3
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vpcmpeqb %ymm4, %ymm0, %ymm4
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vpor %ymm1, %ymm2, %ymm5
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vpor %ymm3, %ymm4, %ymm6
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vpor %ymm5, %ymm6, %ymm5
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vpmovmskb %ymm5, %eax
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testl %eax, %eax
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jz L(loop_4x_vec)
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/* There is a match. */
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vpmovmskb %ymm4, %eax
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testl %eax, %eax
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jnz L(last_vec_x3)
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jnz L(last_vec_x2)
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vpmovmskb %ymm2, %eax
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testl %eax, %eax
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jnz L(last_vec_x1)
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vpmovmskb %ymm1, %eax
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bsrl %eax, %eax
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addq %rdi, %rax
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L(return_vzeroupper):
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ZERO_UPPER_VEC_REGISTERS_RETURN
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.p2align 4
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L(last_4x_vec_or_less):
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addl $(VEC_SIZE * 4), %edx
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cmpl $(VEC_SIZE * 2), %edx
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jbe L(last_2x_vec)
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vpcmpeqb (VEC_SIZE * 3)(%rdi), %ymm0, %ymm1
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vpmovmskb %ymm1, %eax
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testl %eax, %eax
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jnz L(last_vec_x3)
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vpcmpeqb (VEC_SIZE * 2)(%rdi), %ymm0, %ymm2
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vpmovmskb %ymm2, %eax
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testl %eax, %eax
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jnz L(last_vec_x2)
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vpcmpeqb VEC_SIZE(%rdi), %ymm0, %ymm3
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vpmovmskb %ymm3, %eax
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testl %eax, %eax
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jnz L(last_vec_x1_check)
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cmpl $(VEC_SIZE * 3), %edx
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jbe L(zero)
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vpcmpeqb (%rdi), %ymm0, %ymm4
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vpmovmskb %ymm4, %eax
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testl %eax, %eax
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jz L(zero)
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bsrl %eax, %eax
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subq $(VEC_SIZE * 4), %rdx
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addq %rax, %rdx
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jl L(zero)
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(last_2x_vec):
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vpcmpeqb (VEC_SIZE * 3)(%rdi), %ymm0, %ymm1
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vpmovmskb %ymm1, %eax
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testl %eax, %eax
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jnz L(last_vec_x3_check)
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cmpl $VEC_SIZE, %edx
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jbe L(zero)
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vpcmpeqb (VEC_SIZE * 2)(%rdi), %ymm0, %ymm1
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vpmovmskb %ymm1, %eax
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testl %eax, %eax
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jz L(zero)
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bsrl %eax, %eax
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subq $(VEC_SIZE * 2), %rdx
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addq %rax, %rdx
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jl L(zero)
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addl $(VEC_SIZE * 2), %eax
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(last_vec_x0):
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bsrl %eax, %eax
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(last_vec_x1):
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bsrl %eax, %eax
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addl $VEC_SIZE, %eax
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(last_vec_x2):
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bsrl %eax, %eax
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addl $(VEC_SIZE * 2), %eax
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(last_vec_x3):
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bsrl %eax, %eax
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addl $(VEC_SIZE * 3), %eax
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addq %rdi, %rax
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ret
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.p2align 4
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L(last_vec_x1_check):
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bsrl %eax, %eax
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subq $(VEC_SIZE * 3), %rdx
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addq %rax, %rdx
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jl L(zero)
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addl $VEC_SIZE, %eax
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(last_vec_x3_check):
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bsrl %eax, %eax
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subq $VEC_SIZE, %rdx
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addq %rax, %rdx
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jl L(zero)
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addl $(VEC_SIZE * 3), %eax
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(zero):
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xorl %eax, %eax
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VZEROUPPER_RETURN
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.p2align 4
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L(null):
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xorl %eax, %eax
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ret
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.p2align 4
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L(last_vec_or_less_aligned):
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movl %edx, %ecx
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vpcmpeqb (%rdi), %ymm0, %ymm1
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movl $1, %edx
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/* Support rdx << 32. */
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salq %cl, %rdx
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subq $1, %rdx
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vpmovmskb %ymm1, %eax
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/* Remove the trailing bytes. */
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andl %edx, %eax
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testl %eax, %eax
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jz L(zero)
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bsrl %eax, %eax
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addq %rdi, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(last_vec_or_less):
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addl $VEC_SIZE, %edx
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/* Check for zero length. */
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testl %edx, %edx
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jz L(null)
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movl %edi, %ecx
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andl $(VEC_SIZE - 1), %ecx
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jz L(last_vec_or_less_aligned)
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movl %ecx, %esi
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movl %ecx, %r8d
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addl %edx, %esi
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andq $-VEC_SIZE, %rdi
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subl $VEC_SIZE, %esi
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ja L(last_vec_2x_aligned)
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/* Check the last VEC. */
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vpcmpeqb (%rdi), %ymm0, %ymm1
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vpmovmskb %ymm1, %eax
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/* Remove the leading and trailing bytes. */
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sarl %cl, %eax
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movl %edx, %ecx
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movl $1, %edx
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sall %cl, %edx
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subl $1, %edx
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andl %edx, %eax
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testl %eax, %eax
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jz L(zero)
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bsrl %eax, %eax
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addq %rdi, %rax
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addq %r8, %rax
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VZEROUPPER_RETURN
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.p2align 4
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L(last_vec_2x_aligned):
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movl %esi, %ecx
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/* Check the last VEC. */
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vpcmpeqb VEC_SIZE(%rdi), %ymm0, %ymm1
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movl $1, %edx
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sall %cl, %edx
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subl $1, %edx
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vpmovmskb %ymm1, %eax
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/* Remove the trailing bytes. */
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andl %edx, %eax
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testl %eax, %eax
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jnz L(last_vec_x1)
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/* Check the second last VEC. */
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vpcmpeqb (%rdi), %ymm0, %ymm1
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movl %r8d, %ecx
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vpmovmskb %ymm1, %eax
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/* Remove the leading bytes. Must use unsigned right shift for
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bsrl below. */
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shrl %cl, %eax
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testl %eax, %eax
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jz L(zero)
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bsrl %eax, %eax
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addq %rdi, %rax
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addq %r8, %rax
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VZEROUPPER_RETURN
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END (MEMRCHR)
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#endif
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