parent
7733266417
commit
04819ecaae
@ -85,21 +85,21 @@ namespace detail
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glm::uint32 REG2(y);
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glm::uint32 REG2(y);
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glm::uint32 REG3(z);
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glm::uint32 REG3(z);
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REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint32>(0x00FF0000FF0000FF);
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REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint32>(0xFF0000FFu);
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REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint32>(0x00FF0000FF0000FF);
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REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint32>(0xFF0000FFu);
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REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint32>(0x00FF0000FF0000FF);
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REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint32>(0xFF0000FFu);
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REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint32>(0xF00F00F00F00F00F);
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REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint32>(0x0F00F00Fu);
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REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint32>(0xF00F00F00F00F00F);
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REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint32>(0x0F00F00Fu);
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REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint32>(0xF00F00F00F00F00F);
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REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint32>(0x0F00F00Fu);
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REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint32>(0x30C30C30C30C30C3);
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REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint32>(0xC30C30C3u);
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REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint32>(0x30C30C30C30C30C3);
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REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint32>(0xC30C30C3u);
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REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint32>(0x30C30C30C30C30C3);
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REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint32>(0xC30C30C3u);
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REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint32>(0x9249249249249249);
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REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint32>(0x49249249u);
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REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint32>(0x9249249249249249);
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REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint32>(0x49249249u);
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REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint32>(0x9249249249249249);
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REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint32>(0x49249249u);
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return REG1 | (REG2 << 1) | (REG3 << 2);
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return REG1 | (REG2 << 1) | (REG3 << 2);
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}
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}
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