Added NEON, MIPS and PowerPC detection
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@ -68,74 +68,81 @@
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// User defines: GLM_FORCE_PURE GLM_FORCE_SSE2 GLM_FORCE_SSE3 GLM_FORCE_AVX GLM_FORCE_AVX2 GLM_FORCE_AVX2
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#define GLM_ARCH_PURE 0x0000
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#define GLM_ARCH_ARM 0x0001
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#define GLM_ARCH_X86 0x0002
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#define GLM_ARCH_SSE2 0x0004
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#define GLM_ARCH_SSE3 0x0008
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#define GLM_ARCH_SSE4 0x0010
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#define GLM_ARCH_AVX 0x0020
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#define GLM_ARCH_AVX2 0x0040
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#define GLM_ARCH_AVX512 0x0080 // Skylake set
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#define GLM_ARCH_PURE 0x00000000
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#define GLM_ARCH_X86 0x00000001
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#define GLM_ARCH_SSE2 0x00000002
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#define GLM_ARCH_SSE3 0x00000004
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#define GLM_ARCH_SSE4 0x00000008
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#define GLM_ARCH_AVX 0x00000010
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#define GLM_ARCH_AVX2 0x00000020
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#define GLM_ARCH_AVX512 0x00000040 // Skylake subset
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#define GLM_ARCH_ARM 0x00000100
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#define GLM_ARCH_NEON 0x00000200
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#define GLM_ARCH_MIPS 0x00010000
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#define GLM_ARCH_PPC 0x01000000
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#if defined(GLM_FORCE_PURE)
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# define GLM_ARCH GLM_ARCH_PURE
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#elif defined(GLM_FORCE_MIPS)
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# define GLM_ARCH (GLM_ARCH_MIPS)
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#elif defined(GLM_FORCE_PPC)
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# define GLM_ARCH (GLM_ARCH_PPC)
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#elif defined(GLM_FORCE_NEON)
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# define GLM_ARCH (GLM_ARCH_ARM | GLM_ARCH_NEON)
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#elif defined(GLM_FORCE_AVX512)
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# define GLM_ARCH (GLM_ARCH_AVX512 | GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_AVX512 | GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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#elif defined(GLM_FORCE_AVX2)
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# define GLM_ARCH (GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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#elif defined(GLM_FORCE_AVX)
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# define GLM_ARCH (GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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#elif defined(GLM_FORCE_SSE4)
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# define GLM_ARCH (GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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#elif defined(GLM_FORCE_SSE3)
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# define GLM_ARCH (GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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#elif defined(GLM_FORCE_SSE2)
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# define GLM_ARCH (GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_SSE2)
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#elif (GLM_COMPILER & (GLM_COMPILER_LLVM | GLM_COMPILER_GCC)) || ((GLM_COMPILER & GLM_COMPILER_INTEL) && (GLM_PLATFORM & GLM_PLATFORM_LINUX))
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// This is Skylake set of instruction set
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# if defined(__AVX512BW__) && defined(__AVX512F__) && defined(__AVX512CD__) && defined(__AVX512VL__) && defined(__AVX512DQ__)
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# define GLM_ARCH (GLM_ARCH_AVX512 | GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_AVX512 | GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__AVX2__)
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# define GLM_ARCH (GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__AVX__)
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# define GLM_ARCH (GLM_ARCH_AVX | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_AVX | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__SSE3__)
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# define GLM_ARCH (GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__SSE2__)
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# define GLM_ARCH (GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_SSE2)
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# elif defined(__i386__) || defined(__x86_64__)
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# define GLM_ARCH (GLM_ARCH_X86)
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# elif defined(__ARM_NEON)
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# define GLM_ARCH (GLM_ARCH_ARM | GLM_ARCH_NEON)
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# elif defined(__arm__ )
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# define GLM_ARCH (GLM_ARCH_ARM)
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# elif defined(__mips__ )
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# define GLM_ARCH (GLM_ARCH_MIPS)
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# elif defined(__powerpc__ )
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# define GLM_ARCH (GLM_ARCH_PPC)
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# else
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# define GLM_ARCH GLM_ARCH_PURE
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# define GLM_ARCH (GLM_ARCH_PURE)
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# endif
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#elif (GLM_COMPILER & GLM_COMPILER_VC) || ((GLM_COMPILER & GLM_COMPILER_INTEL) && (GLM_PLATFORM & GLM_PLATFORM_WINDOWS))
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# if defined(_M_ARM_FP)
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# if defined(_M_ARM)
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# define GLM_ARCH (GLM_ARCH_ARM)
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# elif defined(__AVX2__)
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# define GLM_ARCH (GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__AVX__)
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# define GLM_ARCH (GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(_M_X64)
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# define GLM_ARCH (GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_SSE2)
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# elif defined(_M_IX86_FP)
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# if _M_IX86_FP >= 2
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# define GLM_ARCH (GLM_ARCH_SSE2)
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# define GLM_ARCH (GLM_ARCH_X86 | GLM_ARCH_SSE2)
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# else
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# define GLM_ARCH (GLM_ARCH_PURE)
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# endif
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# else
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# define GLM_ARCH (GLM_ARCH_PURE)
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# endif
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#elif (GLM_COMPILER & GLM_COMPILER_GCC) && (defined(__i386__) || defined(__x86_64__))
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# if defined(__AVX2__)
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# define GLM_ARCH (GLM_ARCH_AVX2 | GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__AVX__)
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# define GLM_ARCH (GLM_ARCH_AVX | GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__SSE4_1__ )
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# define GLM_ARCH (GLM_ARCH_SSE4 | GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__SSE3__)
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# define GLM_ARCH (GLM_ARCH_SSE3 | GLM_ARCH_SSE2)
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# elif defined(__SSE2__)
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# define GLM_ARCH (GLM_ARCH_SSE2)
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# elif defined(_M_PPC)
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# define GLM_ARCH (GLM_ARCH_PPC)
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# else
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# define GLM_ARCH (GLM_ARCH_PURE)
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# endif
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@ -180,6 +187,16 @@
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# pragma message("GLM: SSE3 instruction set")
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# elif(GLM_ARCH & GLM_ARCH_SSE2)
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# pragma message("GLM: SSE2 instruction set")
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# elif(GLM_ARCH & GLM_ARCH_X86)
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# pragma message("GLM: x86 instruction set")
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# elif(GLM_ARCH & GLM_ARCH_NEON)
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# pragma message("GLM: NEON instruction set")
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# elif(GLM_ARCH & GLM_ARCH_ARM)
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# pragma message("GLM: ARM instruction set")
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# elif(GLM_ARCH & GLM_ARCH_MIPS)
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# pragma message("GLM: MIPS instruction set")
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# elif(GLM_ARCH & GLM_ARCH_PPC)
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# pragma message("GLM: PowerPC architechture")
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# endif//GLM_ARCH
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#endif//GLM_MESSAGE
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@ -265,8 +282,6 @@
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# else
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# if __cplusplus >= 201402L
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# define GLM_LANG GLM_LANG_CXX14
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//# elif GLM_COMPILER >= GLM_COMPILER_VC2015
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//# define GLM_LANG GLM_LANG_CXX1Y
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# elif __cplusplus >= 201103L
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# define GLM_LANG GLM_LANG_CXX11
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# elif GLM_COMPILER >= GLM_COMPILER_VC2010
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@ -71,6 +71,9 @@ glm::mat4 camera(float Translate, glm::vec2 const & Rotate)
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- Improved GLM_FORCE_EXPLICIT_CTOR coverage #481
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- Improved OpenMP support detection for Clang, GCC, ICC and VC
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- Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493
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- Added NEON instruction set detection
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- Added MIPS CPUs detection
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- Added PowerPC CPUs detection
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- Use Cuda built-in function for abs function implementation with Cuda compiler
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##### Fixes:
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