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SPIR-V postprocessing: WEB case only needs CFG mods
The SPIR-V post-processing to discover capabilities and extensions does not apply to WebGPU compilation. So don't include that code. This reclaims some of the code space added by #1943
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@ -687,10 +687,17 @@ public:
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// based on the resulting SPIR-V.
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void postProcess();
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// Prune unreachable blocks in the CFG and remove unneeded decorations.
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void postProcessCFG();
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#ifndef GLSLANG_WEB
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// Add capabilities, extensions based on instructions in the module.
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void postProcessFeatures();
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// Hook to visit each instruction in a block in a function
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void postProcess(Instruction&);
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// Hook to visit each non-32-bit sized float/int operation in a block.
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void postProcessType(const Instruction&, spv::Id typeId);
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#endif
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void dump(std::vector<unsigned int>&) const;
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@ -58,6 +58,7 @@ namespace spv {
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namespace spv {
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#ifndef GLSLANG_WEB
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// Hook to visit each operand type and result type of an instruction.
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// Will be called multiple times for one instruction, once for each typed
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// operand and the result.
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@ -319,9 +320,10 @@ void Builder::postProcess(Instruction& inst)
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}
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}
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}
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#endif
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// comment in header
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void Builder::postProcess()
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void Builder::postProcessCFG()
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{
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// reachableBlocks is the set of blockss reached via control flow, or which are
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// unreachable continue targert or unreachable merge.
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@ -377,7 +379,11 @@ void Builder::postProcess()
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return unreachableDefinitions.count(decoration_id) != 0;
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}),
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decorations.end());
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}
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#ifndef GLSLANG_WEB
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// comment in header
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void Builder::postProcessFeatures() {
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// Add per-instruction capabilities, extensions, etc.,
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// Look for any 8/16 bit type in physical storage buffer class, and set the
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@ -431,5 +437,14 @@ void Builder::postProcess()
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}
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}
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}
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#endif
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// comment in header
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void Builder::postProcess() {
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postProcessCFG();
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#ifndef GLSLANG_WEB
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postProcessFeatures();
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#endif
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}
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}; // end spv namespace
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