More aggressively prune unreachable code as follows.
When no control flow edges reach a merge block or continue target:
- delete their contents so that:
- a merge block becomes OpLabel, then OpUnreachable
- a continue target becomes OpLabel, then an OpBranch back to the
loop header
- any basic block which is dominated by such a merge block or continue
target is removed as well.
- decorations targeting the removed instructions are removed.
Enables the SPIR-V builder post-processing step the GLSLANG_WEB case.
This PR only changes a few lines of code, but is subtle.
In HLSL, comparison operators (<,>,<=,>=,==,!=) operate component-wise
when given a vector operand. If a whole vector equality or inequality is
desired, then all() or any() can be used on the resulting bool vector.
This PR enables this change. Existing shape conversion is used when
one of the two arguments is a vector and one is a scalar.
Some existing HLSL tests had assumed == and != meant vector-wise
instead of component-wise comparisons. These tests have been changed
to add an explicit any() or all() to the test source. This verifably
does not change the final SPIR-V binary relative to the old behavior
for == and !=. The AST does change for the (now explicit, formerly
implicit) any() and all(). Also, a few tests changes where they
previously had the return type wrong, e.g, from a vec < vec comparison
in hlsl.shapeConv.frag.
Promotion of comparison opcodes to vector forms
(EOpEqual->EOpVectorEqual) is handled in promoteBinary(), as is setting
the proper vector type of the result.
EOpVectorEqual and EOpVectorNotEqual are now accepted as either
aggregate or binary nodes, similar to how the other operators are
handled. Partial support already existed for this: it has been
fleshed out in the printing functions in intermOut.cpp.
There is an existing defect around shape conversion with 1-vectors, but
that is orthogonal to this PR and not addressed by it.
