Minor comments refactoring, for better clarity
git-svn-id: https://lz4.googlecode.com/svn/trunk@54 650e7d94-2a16-8b24-b05c-7c0b3f6821cd
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lz4.c
120
lz4.c
@ -30,12 +30,53 @@
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//**************************************
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// Tuning parameters
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//**************************************
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// COMPRESSIONLEVEL :
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// Increasing this value improves compression ratio
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// Lowering this value reduces memory usage
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// Reduced memory usage typically improves speed, due to cache effect (ex : L1 32KB for Intel, L1 64KB for AMD)
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// Memory usage formula : N->2^(N+2) Bytes (examples : 12 -> 16KB ; 17 -> 512KB)
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#define COMPRESSIONLEVEL 12
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// NONCOMPRESSIBLE_CONFIRMATION :
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// Decreasing this value will make the algorithm skip faster data segments considered "incompressible"
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// This may decrease compression ratio dramatically, but will be faster on incompressible data
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// Increasing this value will make the algorithm search more before declaring a segment "incompressible"
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// This could improve compression a bit, but will be slower on incompressible data
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// The default value (6) is recommended
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#define NONCOMPRESSIBLE_CONFIRMATION 6
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// BIG_ENDIAN_NATIVE_BUT_INCOMPATIBLE :
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// This will provide a boost to performance for big endian cpu, but the resulting compressed stream will be incompatible with little-endian CPU.
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// You can set this option to 1 in situations where data will stay within closed environment
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// This option is useless on Little_Endian CPU (such as x86)
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//#define BIG_ENDIAN_NATIVE_BUT_INCOMPATIBLE 1
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//**************************************
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// CPU Feature Detection
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//**************************************
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// 32 or 64 bits ?
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#if (__x86_64__ || __x86_64 || __amd64__ || __amd64 || __ppc64__ || _WIN64 || __LP64__ || _LP64) // Detects 64 bits mode
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#define ARCH64 1
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#else
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#define ARCH64 0
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#endif
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// Little Endian or Big Endian ?
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#if (__BIG_ENDIAN__ || _BIG_ENDIAN || _ARCH_PPC || __PPC__ || __PPC || PPC || __powerpc__ || __powerpc || powerpc || ((defined(__BYTE_ORDER__)&&(__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))) )
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#define CPU_BIG_ENDIAN 1
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#else
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// Little Endian assumed. PDP Endian and other very rare endian format are unsupported.
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#endif
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// Unaligned memory access ?
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// This feature is automatically enabled for "common" CPU, such as x86.
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// For others CPU, you may want to force this option manually to improve performance if your target CPU supports unaligned memory access
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#if (__ARM_FEATURE_UNALIGNED)
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#define CPU_UNALIGNED_ACCESS 1
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#endif
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// Uncomment this parameter if your target system does not support hardware bit count
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//#define _FORCE_SW_BITCOUNT
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@ -54,7 +95,7 @@
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#define inline __forceinline // Visual is not C99, but supports inline
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#endif
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#ifdef __GNUC__
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#if (defined(__GNUC__) && (!(CPU_UNALIGNED_ACCESS)))
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#define _PACKED __attribute__ ((packed))
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#else
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#define _PACKED
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@ -98,7 +139,7 @@
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// Constants
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//**************************************
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#define MINMATCH 4
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#define SKIPSTRENGTH 6
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#define SKIPSTRENGTH (NONCOMPRESSIBLE_CONFIRMATION>2?NONCOMPRESSIBLE_CONFIRMATION:2)
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#define STACKLIMIT 13
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#define HEAPMODE (HASH_LOG>STACKLIMIT) // Defines if memory is allocated into the stack (local variable), or into the heap (malloc()).
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#define COPYLENGTH 8
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@ -150,19 +191,6 @@ typedef struct _U16_S
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//**************************************
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// Architecture-specific macros
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//**************************************
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#if (__x86_64__ || __x86_64 || __amd64__ || __amd64 || __ppc64__ || _WIN64 || __LP64__ || _LP64) // Detects 64 bits mode
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#define ARCH64 1
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#else
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#define ARCH64 0
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#endif
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// The following macro auto-detects Big-endian CPU. You can manually override it in case of bad detection.
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#if (__BIG_ENDIAN__ || _BIG_ENDIAN || _ARCH_PPC || __PPC__ || __PPC || PPC || __powerpc__ || __powerpc || powerpc || ((defined(__BYTE_ORDER__)&&(__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))) )
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#define CPU_BIG_ENDIAN 1
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#else
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// Little Endian assumed. PDP Endian and other very rare endian format are unsupported.
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#endif
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#if ARCH64 // 64-bit
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#define STEPSIZE 8
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#define UARCH U64
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@ -183,14 +211,12 @@ typedef struct _U16_S
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#define INITBASE(base) const int base = 0
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#endif
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#if CPU_BIG_ENDIAN
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#if ((CPU_BIG_ENDIAN) && !(BIG_ENDIAN_NATIVE_BUT_INCOMPATIBLE))
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#define LZ4_READ_LITTLEENDIAN_16(d,s,p) { U16 v = A16(p); v = bswap16(v); d = (s) - v; }
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#define LZ4_WRITE_LITTLEENDIAN_16(p,i) { U16 v = (U16)(i); v = bswap16(v); A16(p) = v; p+=2; }
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#define LZ4_NbCommonBytes LZ4_NbCommonBytes_BigEndian
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#else // Little Endian
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#define LZ4_READ_LITTLEENDIAN_16(d,s,p) { d = (s) - A16(p); }
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#define LZ4_WRITE_LITTLEENDIAN_16(p,v) { A16(p) = v; p+=2; }
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#define LZ4_NbCommonBytes LZ4_NbCommonBytes_LittleEndian
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#endif
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@ -208,22 +234,9 @@ typedef struct _U16_S
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//****************************
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#if ARCH64
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inline static int LZ4_NbCommonBytes_LittleEndian (register U64 val)
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{
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#if defined(_MSC_VER) && !defined(_FORCE_SW_BITCOUNT)
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unsigned long r = 0;
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_BitScanForward64( &r, val );
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return (int)(r>>3);
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#elif defined(__GNUC__) && !defined(_FORCE_SW_BITCOUNT)
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return (__builtin_ctzll(val) >> 3);
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#else
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static const int DeBruijnBytePos[64] = { 0, 0, 0, 0, 0, 1, 1, 2, 0, 3, 1, 3, 1, 4, 2, 7, 0, 2, 3, 6, 1, 5, 3, 5, 1, 3, 4, 4, 2, 5, 6, 7, 7, 0, 1, 2, 3, 3, 4, 6, 2, 6, 5, 5, 3, 4, 5, 6, 7, 1, 2, 4, 6, 4, 4, 5, 7, 2, 6, 5, 7, 6, 7, 7 };
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return DeBruijnBytePos[((U64)((val & -val) * 0x0218A392CDABBD3F)) >> 58];
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#endif
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}
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inline static int LZ4_NbCommonBytes_BigEndian (register U64 val)
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inline static int LZ4_NbCommonBytes (register U64 val)
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{
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#if CPU_BIG_ENDIAN
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#if defined(_MSC_VER) && !defined(_FORCE_SW_BITCOUNT)
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unsigned long r = 0;
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_BitScanReverse64( &r, val );
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@ -237,26 +250,25 @@ inline static int LZ4_NbCommonBytes_BigEndian (register U64 val)
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r += (!val);
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return r;
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#endif
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#else
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#if defined(_MSC_VER) && !defined(_FORCE_SW_BITCOUNT)
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unsigned long r = 0;
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_BitScanForward64( &r, val );
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return (int)(r>>3);
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#elif defined(__GNUC__) && !defined(_FORCE_SW_BITCOUNT)
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return (__builtin_ctzll(val) >> 3);
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#else
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static const int DeBruijnBytePos[64] = { 0, 0, 0, 0, 0, 1, 1, 2, 0, 3, 1, 3, 1, 4, 2, 7, 0, 2, 3, 6, 1, 5, 3, 5, 1, 3, 4, 4, 2, 5, 6, 7, 7, 0, 1, 2, 3, 3, 4, 6, 2, 6, 5, 5, 3, 4, 5, 6, 7, 1, 2, 4, 6, 4, 4, 5, 7, 2, 6, 5, 7, 6, 7, 7 };
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return DeBruijnBytePos[((U64)((val & -val) * 0x0218A392CDABBD3F)) >> 58];
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#endif
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#endif
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}
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#else
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inline static int LZ4_NbCommonBytes_LittleEndian (register U32 val)
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{
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#if defined(_MSC_VER) && !defined(_FORCE_SW_BITCOUNT)
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unsigned long r = 0;
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_BitScanForward( &r, val );
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return (int)(r>>3);
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#elif defined(__GNUC__) && !defined(_FORCE_SW_BITCOUNT)
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return (__builtin_ctz(val) >> 3);
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#else
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static const int DeBruijnBytePos[32] = { 0, 0, 3, 0, 3, 1, 3, 0, 3, 2, 2, 1, 3, 2, 0, 1, 3, 3, 1, 2, 2, 2, 2, 0, 3, 1, 2, 0, 1, 0, 1, 1 };
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return DeBruijnBytePos[((U32)((val & -val) * 0x077CB531U)) >> 27];
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#endif
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}
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inline static int LZ4_NbCommonBytes_BigEndian (register U32 val)
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inline static int LZ4_NbCommonBytes (register U32 val)
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{
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#if CPU_BIG_ENDIAN
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#if defined(_MSC_VER) && !defined(_FORCE_SW_BITCOUNT)
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unsigned long r = 0;
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_BitScanReverse( &r, val );
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@ -269,6 +281,18 @@ inline static int LZ4_NbCommonBytes_BigEndian (register U32 val)
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r += (!val);
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return r;
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#endif
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#else
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#if defined(_MSC_VER) && !defined(_FORCE_SW_BITCOUNT)
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unsigned long r = 0;
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_BitScanForward( &r, val );
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return (int)(r>>3);
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#elif defined(__GNUC__) && !defined(_FORCE_SW_BITCOUNT)
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return (__builtin_ctz(val) >> 3);
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#else
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static const int DeBruijnBytePos[32] = { 0, 0, 3, 0, 3, 1, 3, 0, 3, 2, 2, 1, 3, 2, 0, 1, 3, 3, 1, 2, 2, 2, 2, 0, 3, 1, 2, 0, 1, 0, 1, 1 };
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return DeBruijnBytePos[((U32)((val & -val) * 0x077CB531U)) >> 27];
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#endif
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#endif
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}
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#endif
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