5c1e24ca05
On x32 systems, pointers are 4-bytes wide and are therefore stored in %e?x registers (instead of %r?x registers). These registers must be accessed using "addl" instead of "addq", however the GNU assembler will acccept the generic "add" instruction and determine the correct opcode based on the registers passed to it.
465 lines
18 KiB
C
465 lines
18 KiB
C
/*
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* AES-NI support functions
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*
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* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* This file is part of mbed TLS (https://tls.mbed.org)
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*/
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/*
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* [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
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* [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
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*/
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#if !defined(MBEDTLS_CONFIG_FILE)
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#include "mbedtls/config.h"
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#else
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#include MBEDTLS_CONFIG_FILE
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#endif
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#if defined(MBEDTLS_AESNI_C)
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#include "mbedtls/aesni.h"
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#include <string.h>
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#ifndef asm
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#define asm __asm
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#endif
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#if defined(MBEDTLS_HAVE_X86_64)
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/*
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* AES-NI support detection routine
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*/
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int mbedtls_aesni_has_support( unsigned int what )
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{
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static int done = 0;
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static unsigned int c = 0;
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if( ! done )
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{
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asm( "movl $1, %%eax \n\t"
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"cpuid \n\t"
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: "=c" (c)
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:
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: "eax", "ebx", "edx" );
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done = 1;
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}
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return( ( c & what ) != 0 );
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}
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/*
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* Binutils needs to be at least 2.19 to support AES-NI instructions.
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* Unfortunately, a lot of users have a lower version now (2014-04).
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* Emit bytecode directly in order to support "old" version of gas.
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*
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* Opcodes from the Intel architecture reference manual, vol. 3.
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* We always use registers, so we don't need prefixes for memory operands.
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* Operand macros are in gas order (src, dst) as opposed to Intel order
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* (dst, src) in order to blend better into the surrounding assembly code.
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*/
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#define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
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#define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
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#define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
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#define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
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#define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
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#define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
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#define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
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#define xmm0_xmm0 "0xC0"
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#define xmm0_xmm1 "0xC8"
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#define xmm0_xmm2 "0xD0"
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#define xmm0_xmm3 "0xD8"
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#define xmm0_xmm4 "0xE0"
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#define xmm1_xmm0 "0xC1"
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#define xmm1_xmm2 "0xD1"
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/*
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* AES-NI AES-ECB block en(de)cryption
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*/
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int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
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int mode,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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asm( "movdqu (%3), %%xmm0 \n\t" // load input
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"movdqu (%1), %%xmm1 \n\t" // load round key 0
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"pxor %%xmm1, %%xmm0 \n\t" // round 0
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"add $16, %1 \n\t" // point to next round key
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"subl $1, %0 \n\t" // normal rounds = nr - 1
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"test %2, %2 \n\t" // mode?
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"jz 2f \n\t" // 0 = decrypt
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"1: \n\t" // encryption loop
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESENC xmm1_xmm0 "\n\t" // do round
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"add $16, %1 \n\t" // point to next round key
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"subl $1, %0 \n\t" // loop
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"jnz 1b \n\t"
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESENCLAST xmm1_xmm0 "\n\t" // last round
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"jmp 3f \n\t"
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"2: \n\t" // decryption loop
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"movdqu (%1), %%xmm1 \n\t"
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AESDEC xmm1_xmm0 "\n\t" // do round
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"add $16, %1 \n\t"
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"subl $1, %0 \n\t"
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"jnz 2b \n\t"
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESDECLAST xmm1_xmm0 "\n\t" // last round
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"3: \n\t"
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"movdqu %%xmm0, (%4) \n\t" // export output
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:
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: "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
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: "memory", "cc", "xmm0", "xmm1" );
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return( 0 );
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}
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/*
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* GCM multiplication: c = a times b in GF(2^128)
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* Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
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*/
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void mbedtls_aesni_gcm_mult( unsigned char c[16],
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const unsigned char a[16],
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const unsigned char b[16] )
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{
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unsigned char aa[16], bb[16], cc[16];
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size_t i;
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/* The inputs are in big-endian order, so byte-reverse them */
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for( i = 0; i < 16; i++ )
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{
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aa[i] = a[15 - i];
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bb[i] = b[15 - i];
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}
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asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0
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"movdqu (%1), %%xmm1 \n\t" // b1:b0
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/*
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* Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
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* using [CLMUL-WP] algorithm 1 (p. 13).
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*/
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"movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
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"movdqa %%xmm1, %%xmm3 \n\t" // same
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"movdqa %%xmm1, %%xmm4 \n\t" // same
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PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
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PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
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PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
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PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
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"pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
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"movdqa %%xmm4, %%xmm3 \n\t" // same
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"psrldq $8, %%xmm4 \n\t" // 0:e1+f1
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"pslldq $8, %%xmm3 \n\t" // e0+f0:0
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"pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
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"pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
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/*
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* Now shift the result one bit to the left,
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* taking advantage of [CLMUL-WP] eq 27 (p. 20)
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*/
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"movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
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"movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
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"psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
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"psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
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"psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
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"psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
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"movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
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"pslldq $8, %%xmm3 \n\t" // r0>>63:0
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"pslldq $8, %%xmm4 \n\t" // r2>>63:0
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"psrldq $8, %%xmm5 \n\t" // 0:r1>>63
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"por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
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"por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
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"por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
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/*
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* Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
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* using [CLMUL-WP] algorithm 5 (p. 20).
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* Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
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*/
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/* Step 2 (1) */
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"movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
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"movdqa %%xmm1, %%xmm4 \n\t" // same
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"movdqa %%xmm1, %%xmm5 \n\t" // same
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"psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
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"psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
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"psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
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/* Step 2 (2) */
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"pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
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"pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
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"pslldq $8, %%xmm3 \n\t" // a+b+c:0
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"pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
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/* Steps 3 and 4 */
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"movdqa %%xmm1,%%xmm0 \n\t" // d:x0
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"movdqa %%xmm1,%%xmm4 \n\t" // same
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"movdqa %%xmm1,%%xmm5 \n\t" // same
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"psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
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"psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
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"psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
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"pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
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"pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
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// e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
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// bits carried from d. Now get those\t bits back in.
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"movdqa %%xmm1,%%xmm3 \n\t" // d:x0
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"movdqa %%xmm1,%%xmm4 \n\t" // same
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"movdqa %%xmm1,%%xmm5 \n\t" // same
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"psllq $63, %%xmm3 \n\t" // d<<63:stuff
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"psllq $62, %%xmm4 \n\t" // d<<62:stuff
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"psllq $57, %%xmm5 \n\t" // d<<57:stuff
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"pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
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"pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
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"psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
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"pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
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"pxor %%xmm1, %%xmm0 \n\t" // h1:h0
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"pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
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"movdqu %%xmm0, (%2) \n\t" // done
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:
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: "r" (aa), "r" (bb), "r" (cc)
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: "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
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/* Now byte-reverse the outputs */
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for( i = 0; i < 16; i++ )
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c[i] = cc[15 - i];
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return;
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}
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/*
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* Compute decryption round keys from encryption round keys
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*/
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void mbedtls_aesni_inverse_key( unsigned char *invkey,
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const unsigned char *fwdkey, int nr )
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{
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unsigned char *ik = invkey;
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const unsigned char *fk = fwdkey + 16 * nr;
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memcpy( ik, fk, 16 );
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for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
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asm( "movdqu (%0), %%xmm0 \n\t"
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AESIMC xmm0_xmm0 "\n\t"
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"movdqu %%xmm0, (%1) \n\t"
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:
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: "r" (fk), "r" (ik)
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: "memory", "xmm0" );
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memcpy( ik, fk, 16 );
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}
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/*
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* Key expansion, 128-bit case
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*/
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static void aesni_setkey_enc_128( unsigned char *rk,
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const unsigned char *key )
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{
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asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
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"movdqu %%xmm0, (%0) \n\t" // as round key 0
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"jmp 2f \n\t" // skip auxiliary routine
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/*
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* Finish generating the next round key.
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*
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* On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
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* with X = rot( sub( r3 ) ) ^ RCON.
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*
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* On exit, xmm0 is r7:r6:r5:r4
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* with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
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* and those are written to the round key buffer.
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*/
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"1: \n\t"
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"pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
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"pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
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"pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
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"pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
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"pslldq $4, %%xmm0 \n\t" // etc
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"pxor %%xmm0, %%xmm1 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
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"add $16, %0 \n\t" // point to next round key
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"movdqu %%xmm0, (%0) \n\t" // write it
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"ret \n\t"
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/* Main "loop" */
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"2: \n\t"
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AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
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:
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: "r" (rk), "r" (key)
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: "memory", "cc", "0" );
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}
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/*
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* Key expansion, 192-bit case
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*/
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static void aesni_setkey_enc_192( unsigned char *rk,
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const unsigned char *key )
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{
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asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
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"movdqu %%xmm0, (%0) \n\t"
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"add $16, %0 \n\t"
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"movq 16(%1), %%xmm1 \n\t"
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"movq %%xmm1, (%0) \n\t"
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"add $8, %0 \n\t"
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"jmp 2f \n\t" // skip auxiliary routine
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/*
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* Finish generating the next 6 quarter-keys.
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*
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* On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
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* and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
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*
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* On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
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* and those are written to the round key buffer.
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*/
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"1: \n\t"
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"pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
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"pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
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"pslldq $4, %%xmm0 \n\t" // etc
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
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"movdqu %%xmm0, (%0) \n\t"
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"add $16, %0 \n\t"
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"pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
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"pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
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"pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
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"pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
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"movq %%xmm1, (%0) \n\t"
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"add $8, %0 \n\t"
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"ret \n\t"
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"2: \n\t"
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AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
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:
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: "r" (rk), "r" (key)
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: "memory", "cc", "0" );
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}
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/*
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* Key expansion, 256-bit case
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*/
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static void aesni_setkey_enc_256( unsigned char *rk,
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const unsigned char *key )
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{
|
|
asm( "movdqu (%1), %%xmm0 \n\t"
|
|
"movdqu %%xmm0, (%0) \n\t"
|
|
"add $16, %0 \n\t"
|
|
"movdqu 16(%1), %%xmm1 \n\t"
|
|
"movdqu %%xmm1, (%0) \n\t"
|
|
"jmp 2f \n\t" // skip auxiliary routine
|
|
|
|
/*
|
|
* Finish generating the next two round keys.
|
|
*
|
|
* On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
|
|
* xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
|
|
*
|
|
* On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
|
|
* and those have been written to the output buffer.
|
|
*/
|
|
"1: \n\t"
|
|
"pshufd $0xff, %%xmm2, %%xmm2 \n\t"
|
|
"pxor %%xmm0, %%xmm2 \n\t"
|
|
"pslldq $4, %%xmm0 \n\t"
|
|
"pxor %%xmm0, %%xmm2 \n\t"
|
|
"pslldq $4, %%xmm0 \n\t"
|
|
"pxor %%xmm0, %%xmm2 \n\t"
|
|
"pslldq $4, %%xmm0 \n\t"
|
|
"pxor %%xmm2, %%xmm0 \n\t"
|
|
"add $16, %0 \n\t"
|
|
"movdqu %%xmm0, (%0) \n\t"
|
|
|
|
/* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
|
|
* and proceed to generate next round key from there */
|
|
AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
|
|
"pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
|
|
"pxor %%xmm1, %%xmm2 \n\t"
|
|
"pslldq $4, %%xmm1 \n\t"
|
|
"pxor %%xmm1, %%xmm2 \n\t"
|
|
"pslldq $4, %%xmm1 \n\t"
|
|
"pxor %%xmm1, %%xmm2 \n\t"
|
|
"pslldq $4, %%xmm1 \n\t"
|
|
"pxor %%xmm2, %%xmm1 \n\t"
|
|
"add $16, %0 \n\t"
|
|
"movdqu %%xmm1, (%0) \n\t"
|
|
"ret \n\t"
|
|
|
|
/*
|
|
* Main "loop" - Generating one more key than necessary,
|
|
* see definition of mbedtls_aes_context.buf
|
|
*/
|
|
"2: \n\t"
|
|
AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
|
|
AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
|
|
AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
|
|
AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
|
|
AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
|
|
AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
|
|
AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
|
|
:
|
|
: "r" (rk), "r" (key)
|
|
: "memory", "cc", "0" );
|
|
}
|
|
|
|
/*
|
|
* Key expansion, wrapper
|
|
*/
|
|
int mbedtls_aesni_setkey_enc( unsigned char *rk,
|
|
const unsigned char *key,
|
|
size_t bits )
|
|
{
|
|
switch( bits )
|
|
{
|
|
case 128: aesni_setkey_enc_128( rk, key ); break;
|
|
case 192: aesni_setkey_enc_192( rk, key ); break;
|
|
case 256: aesni_setkey_enc_256( rk, key ); break;
|
|
default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
|
|
}
|
|
|
|
return( 0 );
|
|
}
|
|
|
|
#endif /* MBEDTLS_HAVE_X86_64 */
|
|
|
|
#endif /* MBEDTLS_AESNI_C */
|