add i64 atomics
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daan
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e1b4f036ca
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4355ab7d20
@ -67,8 +67,8 @@ terms of the MIT license. A copy of the license can be found in the file
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#define mi_atomic_decrement_acq_rel(p) mi_atomic_sub_acq_rel(p,(uintptr_t)1)
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static inline void mi_atomic_yield(void);
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static inline intptr_t mi_atomic_addi(_Atomic(intptr_t)* p, intptr_t add);
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static inline intptr_t mi_atomic_subi(_Atomic(intptr_t)* p, intptr_t sub);
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static inline intptr_t mi_atomic_addi(_Atomic(intptr_t)*p, intptr_t add);
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static inline intptr_t mi_atomic_subi(_Atomic(intptr_t)*p, intptr_t sub);
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#if defined(__cplusplus) || !defined(_MSC_VER)
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@ -106,6 +106,13 @@ static inline void mi_atomic_maxi64_relaxed(volatile int64_t* p, int64_t x) {
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while (current < x && !mi_atomic_cas_weak_release((_Atomic(int64_t)*)p, ¤t, x)) { /* nothing */ };
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}
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// Used by timers
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#define mi_atomic_loadi64_acquire(p) mi_atomic(load_explicit)(p,mi_memory_order(acquire))
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#define mi_atomic_loadi64_relaxed(p) mi_atomic(load_explicit)(p,mi_memory_order(relaxed))
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#define mi_atomic_storei64_release(p,x) mi_atomic(store_explicit)(p,x,mi_memory_order(release))
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#define mi_atomic_storei64_relaxed(p,x) mi_atomic(store_explicit)(p,x,mi_memory_order(relaxed))
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#elif defined(_MSC_VER)
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@ -130,7 +137,7 @@ typedef enum mi_memory_order_e {
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mi_memory_order_seq_cst
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} mi_memory_order;
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static inline uintptr_t mi_atomic_fetch_add_explicit(_Atomic(uintptr_t)* p, uintptr_t add, mi_memory_order mo) {
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static inline uintptr_t mi_atomic_fetch_add_explicit(_Atomic(uintptr_t)*p, uintptr_t add, mi_memory_order mo) {
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(void)(mo);
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return (uintptr_t)MI_64(_InterlockedExchangeAdd)((volatile msc_intptr_t*)p, (msc_intptr_t)add);
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}
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@ -138,15 +145,15 @@ static inline uintptr_t mi_atomic_fetch_sub_explicit(_Atomic(uintptr_t)*p, uintp
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(void)(mo);
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return (uintptr_t)MI_64(_InterlockedExchangeAdd)((volatile msc_intptr_t*)p, -((msc_intptr_t)sub));
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}
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static inline uintptr_t mi_atomic_fetch_and_explicit(_Atomic(uintptr_t)* p, uintptr_t x, mi_memory_order mo) {
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static inline uintptr_t mi_atomic_fetch_and_explicit(_Atomic(uintptr_t)*p, uintptr_t x, mi_memory_order mo) {
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(void)(mo);
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return (uintptr_t)MI_64(_InterlockedAnd)((volatile msc_intptr_t*)p, (msc_intptr_t)x);
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}
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static inline uintptr_t mi_atomic_fetch_or_explicit(_Atomic(uintptr_t)* p, uintptr_t x, mi_memory_order mo) {
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static inline uintptr_t mi_atomic_fetch_or_explicit(_Atomic(uintptr_t)*p, uintptr_t x, mi_memory_order mo) {
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(void)(mo);
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return (uintptr_t)MI_64(_InterlockedOr)((volatile msc_intptr_t*)p, (msc_intptr_t)x);
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}
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static inline bool mi_atomic_compare_exchange_strong_explicit(_Atomic(uintptr_t)* p, uintptr_t* expected, uintptr_t desired, mi_memory_order mo1, mi_memory_order mo2) {
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static inline bool mi_atomic_compare_exchange_strong_explicit(_Atomic(uintptr_t)*p, uintptr_t* expected, uintptr_t desired, mi_memory_order mo1, mi_memory_order mo2) {
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(void)(mo1); (void)(mo2);
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uintptr_t read = (uintptr_t)MI_64(_InterlockedCompareExchange)((volatile msc_intptr_t*)p, (msc_intptr_t)desired, (msc_intptr_t)(*expected));
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if (read == *expected) {
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@ -160,7 +167,7 @@ static inline bool mi_atomic_compare_exchange_strong_explicit(_Atomic(uintptr_t)
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static inline bool mi_atomic_compare_exchange_weak_explicit(_Atomic(uintptr_t)*p, uintptr_t* expected, uintptr_t desired, mi_memory_order mo1, mi_memory_order mo2) {
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return mi_atomic_compare_exchange_strong_explicit(p, expected, desired, mo1, mo2);
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}
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static inline uintptr_t mi_atomic_exchange_explicit(_Atomic(uintptr_t)* p, uintptr_t exchange, mi_memory_order mo) {
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static inline uintptr_t mi_atomic_exchange_explicit(_Atomic(uintptr_t)*p, uintptr_t exchange, mi_memory_order mo) {
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(void)(mo);
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return (uintptr_t)MI_64(_InterlockedExchange)((volatile msc_intptr_t*)p, (msc_intptr_t)exchange);
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}
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@ -171,30 +178,51 @@ static inline void mi_atomic_thread_fence(mi_memory_order mo) {
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}
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static inline uintptr_t mi_atomic_load_explicit(_Atomic(uintptr_t) const* p, mi_memory_order mo) {
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(void)(mo);
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#if defined(_M_IX86) || defined(_M_X64)
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#if defined(_M_IX86) || defined(_M_X64)
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return *p;
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#else
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#else
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uintptr_t x = *p;
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if (mo > mi_memory_order_relaxed) {
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while (!mi_atomic_compare_exchange_weak_explicit(p, &x, x, mo, mi_memory_order_relaxed)) { /* nothing */ };
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}
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return x;
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#endif
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#endif
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}
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static inline void mi_atomic_store_explicit(_Atomic(uintptr_t)* p, uintptr_t x, mi_memory_order mo) {
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static inline void mi_atomic_store_explicit(_Atomic(uintptr_t)*p, uintptr_t x, mi_memory_order mo) {
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(void)(mo);
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#if defined(_M_IX86) || defined(_M_X64)
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#if defined(_M_IX86) || defined(_M_X64)
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*p = x;
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#else
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mi_atomic_exchange_explicit(p,x,mo);
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#endif
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#else
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mi_atomic_exchange_explicit(p, x, mo);
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#endif
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}
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static inline int64_t mi_atomic_loadi64_explicit(_Atomic(int64_t)*p, mi_memory_order mo) {
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(void)(mo);
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#if defined(_M_X64)
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return *p;
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#else
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int64_t old = *p;
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int64_t x = old;
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while ((old = InterlockedCompareExchange64(p, x, old)) != x) {
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x = old;
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}
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return x;
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#endif
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}
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static inline void mi_atomic_storei64_explicit(_Atomic(int64_t)*p, int64_t x, mi_memory_order mo) {
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(void)(mo);
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#if defined(x_M_IX86) || defined(_M_X64)
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*p = x;
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#else
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InterlockedExchange64(p, x);
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#endif
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}
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// These are used by the statistics
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static inline int64_t mi_atomic_addi64_relaxed(volatile _Atomic(int64_t)* p, int64_t add) {
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#ifdef _WIN64
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return (int64_t)mi_atomic_addi((int64_t*)p,add);
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#else
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static inline int64_t mi_atomic_addi64_relaxed(volatile _Atomic(int64_t)*p, int64_t add) {
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#ifdef _WIN64
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return (int64_t)mi_atomic_addi((int64_t*)p, add);
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#else
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int64_t current;
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int64_t sum;
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do {
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@ -202,7 +230,7 @@ static inline int64_t mi_atomic_addi64_relaxed(volatile _Atomic(int64_t)* p, int
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sum = current + add;
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} while (_InterlockedCompareExchange64(p, sum, current) != current);
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return current;
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#endif
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#endif
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}
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static inline void mi_atomic_maxi64_relaxed(volatile _Atomic(int64_t)*p, int64_t x) {
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int64_t current;
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@ -222,6 +250,12 @@ static inline void mi_atomic_maxi64_relaxed(volatile _Atomic(int64_t)*p, int64_t
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#define mi_atomic_exchange_ptr_release(tp,p,x) (tp*)mi_atomic_exchange_release((_Atomic(uintptr_t)*)(p),(uintptr_t)x)
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#define mi_atomic_exchange_ptr_acq_rel(tp,p,x) (tp*)mi_atomic_exchange_acq_rel((_Atomic(uintptr_t)*)(p),(uintptr_t)x)
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#define mi_atomic_loadi64_acquire(p) mi_atomic(loadi64_explicit)(p,mi_memory_order(acquire))
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#define mi_atomic_loadi64_relaxed(p) mi_atomic(loadi64_explicit)(p,mi_memory_order(relaxed))
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#define mi_atomic_storei64_release(p,x) mi_atomic(storei64_explicit)(p,x,mi_memory_order(release))
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#define mi_atomic_storei64_relaxed(p,x) mi_atomic(storei64_explicit)(p,x,mi_memory_order(relaxed))
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#endif
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@ -250,13 +284,13 @@ static inline void mi_atomic_yield(void) {
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#elif (defined(__GNUC__) || defined(__clang__)) && \
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(defined(__x86_64__) || defined(__i386__) || defined(__arm__) || defined(__aarch64__))
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#if defined(__x86_64__) || defined(__i386__)
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static inline void mi_atomic_yield(void) {
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__asm__ volatile ("pause" ::: "memory");
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}
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static inline void mi_atomic_yield(void) {
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__asm__ volatile ("pause" ::: "memory");
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}
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#elif defined(__arm__) || defined(__aarch64__)
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static inline void mi_atomic_yield(void) {
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__asm__ volatile("yield");
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}
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static inline void mi_atomic_yield(void) {
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__asm__ volatile("yield");
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}
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#endif
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#elif defined(__wasi__)
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#include <sched.h>
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@ -271,4 +305,4 @@ static inline void mi_atomic_yield(void) {
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#endif
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#endif // __MIMALLOC_ATOMIC_H
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#endif // __MIMALLOC_ATOMIC_H
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