AuroraMiddleware/qt5base-lts
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Use an enum to check that the OS is saving the register state

Browse Source 
It's easier to read AVXState and AVX512State than 6 and 0xe6.

Also add a note that where we should have checked whether the SSE state
is being saved by the OS. However, we won't do it because it's just a
waste of CPU cycles: any OS Qt 5 runs on will enable the proper
state-saving.

Change-Id: Id87b59fe1388a6cab983c9412341e36a86dd15c5
Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
This commit is contained in:
Thiago Macieira 2014-07-29 10:51:32 -07:00
parent c7386938b4
commit 01cce12820
1 changed files with 18 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
src/corelib/tools/qsimd.cpp
View File

@ -253,6 +253,22 @@ static void xgetbv(uint in, uint &eax, uint &edx)
static inline uint detectProcessorFeatures() static inline uint detectProcessorFeatures()
{ {
// Flags from the CR0 / XCR0 state register
enum XCR0Flags {
X87 = 1 << 0,
XMM0_15 = 1 << 1,
YMM0_15Hi128 = 1 << 2,
BNDRegs = 1 << 3,
BNDCSR = 1 << 4,
OpMask = 1 << 5,
ZMM0_15Hi256 = 1 << 6,
ZMM16_31 = 1 << 7,
SSEState = XMM0_15,
AVXState = XMM0_15 | YMM0_15Hi128,
AVX512State = AVXState | OpMask | ZMM0_15Hi256 | ZMM16_31
};
uint features = 0; uint features = 0;
int cpuidLevel = maxBasicCpuidSupported(); int cpuidLevel = maxBasicCpuidSupported();
if (cpuidLevel < 1) if (cpuidLevel < 1)
@ -264,6 +280,7 @@ static inline uint detectProcessorFeatures()
// x86 might not have SSE2 support // x86 might not have SSE2 support
if (cpuid01EDX & (1u << 26)) if (cpuid01EDX & (1u << 26))
features |= SSE2; features |= SSE2;
// we should verify that the OS enabled saving of the SSE state...
#else #else
// x86-64 or x32 // x86-64 or x32
features = SSE2; features = SSE2;
@ -291,7 +308,7 @@ static inline uint detectProcessorFeatures()
if (cpuidLevel >= 7) if (cpuidLevel >= 7)
cpuidFeatures07_00(cpuid0700EBX); cpuidFeatures07_00(cpuid0700EBX);
if ((xgetbvA & 6) == 6) { if ((xgetbvA & AVXState) == AVXState) {
// support for YMM and XMM registers is enabled // support for YMM and XMM registers is enabled
if (cpuid01ECX & (1u << 28)) if (cpuid01ECX & (1u << 28))
features |= AVX; features |= AVX;