Define Q_PROCESSOR_X86 to the x86 family
They are: 3 Intel 80386 or equivalent 4 Intel 80486 or equivalent 5 Intel Pentium, Pentium MMX, AMD K6 and a few others 6 everything since the Intel Pentium Pro and AMD Athlon By necessity, this means all 64-bit builds have a family of 6. That matches the family number that the CPUID instruction produces. Change-Id: I5dc7344976f8da65938f44310b89ade4fe3f1a28 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@digia.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
This commit is contained in:
parent
c374f4441a
commit
065cff8311
@ -157,11 +157,33 @@
|
||||
X86 is little-endian.
|
||||
*/
|
||||
#elif defined(__i386) || defined(__i386__) || defined(_M_IX86)
|
||||
# define Q_PROCESSOR_X86
|
||||
# define Q_PROCESSOR_X86_32
|
||||
# define Q_BYTE_ORDER Q_LITTLE_ENDIAN
|
||||
|
||||
/*
|
||||
* We define Q_PROCESSOR_X86 == 6 for anything above a equivalent or better
|
||||
* than a Pentium Pro (the processor whose architecture was called P6) or an
|
||||
* Athlon.
|
||||
*
|
||||
* All processors since the Pentium III and the Athlon 4 have SSE support, so
|
||||
* we use that to detect. That leaves the original Athlon, Pentium Pro and
|
||||
* Pentium II.
|
||||
*/
|
||||
|
||||
# if defined(_M_IX86)
|
||||
# define Q_PROCESSOR_X86 (_M_IX86/100)
|
||||
# elif defined(__i686__) || defined(__athlon__) || defined(__SSE__)
|
||||
# define Q_PROCESSOR_X86 6
|
||||
# elif defined(__i586__) || defined(__k6__)
|
||||
# define Q_PROCESSOR_X86 5
|
||||
# elif defined(__i486__)
|
||||
# define Q_PROCESSOR_X86 4
|
||||
# else
|
||||
# define Q_PROCESSOR_X86 3
|
||||
# endif
|
||||
|
||||
#elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64) || defined(_M_X64)
|
||||
# define Q_PROCESSOR_X86
|
||||
# define Q_PROCESSOR_X86 6
|
||||
# define Q_PROCESSOR_X86_64
|
||||
# define Q_BYTE_ORDER Q_LITTLE_ENDIAN
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user