fix build with mingw
since MinGW is GCC, invert the order and place the GCC constructs first Change-Id: I98113aa77e51f9e01c3641987e915bf475053a60 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
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@ -156,12 +156,7 @@ static inline uint detectProcessorFeatures()
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static int maxBasicCpuidSupported()
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{
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#ifdef Q_OS_WIN
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// Use the __cpuid function; if the CPUID instruction isn't supported, it will return 0
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int info[4];
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__cpuid(info, 0);
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return info[0];
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#elif defined(Q_CC_GNU)
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#if defined(Q_CC_GNU)
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long tmp1;
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# ifdef Q_PROCESSOR_X86_32
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@ -190,6 +185,11 @@ static int maxBasicCpuidSupported()
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: "0" (0)
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: "ecx", "edx");
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return result;
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#elif defined(Q_OS_WIN)
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// Use the __cpuid function; if the CPUID instruction isn't supported, it will return 0
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int info[4];
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__cpuid(info, 0);
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return info[0];
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#else
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return 0;
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#endif
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@ -197,28 +197,24 @@ static int maxBasicCpuidSupported()
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static void cpuidFeatures01(uint &ecx, uint &edx)
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{
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#ifdef Q_OS_WIN
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int info[4];
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__cpuid(info, 1);
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ecx = info[2];
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edx = info[3];
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#elif defined(Q_CC_GNU)
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#if defined(Q_CC_GNU)
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long tmp1;
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asm ("xchg " PICreg", %2\n"
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"cpuid\n"
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"xchg " PICreg", %2\n"
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: "=&c" (ecx), "=&d" (edx), "=&r" (tmp1)
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: "a" (1));
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#elif defined(Q_OS_WIN)
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int info[4];
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__cpuid(info, 1);
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ecx = info[2];
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edx = info[3];
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#endif
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}
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static void cpuidFeatures07_00(uint &ebx)
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{
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#ifdef Q_OS_WIN
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int info[4];
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__cpuidex(info, 7, 0);
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ebx = info[1];
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#elif defined(Q_CC_GNU)
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#if defined(Q_CC_GNU)
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unsigned long rbx; // in case it's 64-bit
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asm ("xchg " PICreg", %0\n"
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"cpuid\n"
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@ -227,6 +223,10 @@ static void cpuidFeatures07_00(uint &ebx)
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: "a" (7), "c" (0)
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: "%edx");
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ebx = rbx;
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#elif defined(Q_OS_WIN)
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int info[4];
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__cpuidex(info, 7, 0);
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ebx = info[1];
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#endif
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}
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