qsimd_p.h: remove BMI1 feature from the ARCH_HASWELL list
AMD introduced BMI1 to one of their processor generations before AVX2
and BMI2. Complements a98cf15ed1
.
Fixes: QTBUG-107072
Pick-to: 6.4
Change-Id: I810d70e579eb4e2c8e45fffd1719b15d80d88c10
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
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@ -220,14 +220,15 @@ asm(
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// The Intel Core 4th generation was codenamed "Haswell" and introduced AVX2,
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// BMI1, BMI2, FMA, LZCNT, MOVBE, which makes it a good divider for a
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// sub-target for us. The first AMD processor with AVX2 support (Zen) has the
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// same features. This feature set was chosen as the version 3 of the x86-64
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// ISA (x86-64-v3) and is supported by GCC and Clang.
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// same features, but had already introduced BMI1 in the previous generation.
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// This feature set was chosen as the version 3 of the x86-64 ISA (x86-64-v3)
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// and is supported by GCC and Clang.
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//
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// macOS's fat binaries support the "x86_64h" sub-architecture and the GNU libc
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// ELF loader also supports a "haswell/" subdir (e.g., /usr/lib/haswell).
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# define ARCH_HASWELL_MACROS (__AVX2__ + __BMI__ + __BMI2__ + __FMA__ + __LZCNT__)
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# define ARCH_HASWELL_MACROS (__AVX2__ + __BMI2__ + __FMA__ + __LZCNT__)
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# if ARCH_HASWELL_MACROS != 0
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# if ARCH_HASWELL_MACROS != 5
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# if ARCH_HASWELL_MACROS != 4
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# error "Please enable all x86-64-v3 extensions; you probably want to use -march=haswell or -march=x86-64-v3 instead of -mavx2"
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# endif
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static_assert(ARCH_HASWELL_MACROS, "Undeclared identifiers indicate which features are missing.");
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