Complete MIPS atomic support on pre-MIPS32 architectures
Extend the support for pre-MIPS32 architectures (done mostly in
60b6b28c21
) also to orderedMemoryFence.
Change-Id: I50b9091c16166b8434a07988053c1f901d528237
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
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@ -120,7 +120,10 @@ void QBasicAtomicOps<size>::releaseMemoryFence(const T &) Q_DECL_NOTHROW
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template <int size> template <typename T> inline
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void QBasicAtomicOps<size>::orderedMemoryFence(const T &) Q_DECL_NOTHROW
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{
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asm volatile ("sync 0" ::: "memory");
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asm volatile (".set push\n"
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".set mips32\n"
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"sync 0\n"
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".set pop\n" ::: "memory");
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}
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template<> template<typename T> inline
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