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qsimd_p.h: disallow building with just -mavx2 instead of full x86-64-v3

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It's probably a user mistake that they didn't know what they really
wanted. Since no processor that supports AVX2 fails to support the rest
of x86-64-v3, we should enable all of that so we can make use of its
features. Notably, we may want to use FMA at some point in QtGui, and
the compiler will likely use BMI, BMI2, and LZCNT on its own (see
qnumeric.h).

Compiling with -mavx2 will produce GCC these errors:

 qsimd_p.h:266:8: error: #error "Please enable all x86-64-v3 extensions; you probably want to use -march=haswell or -march=x86-64-v3 instead of -mavx2"
 qsimd_p.h:263:49: error: ‘__BMI__’ was not declared in this scope
 qsimd_p.h:263:59: error: ‘__BMI2__’ was not declared in this scope
 qsimd_p.h:263:70: error: ‘__F16C__’ was not declared in this scope
 qsimd_p.h:263:81: error: ‘__FMA__’ was not declared in this scope
 qsimd_p.h:263:91: error: ‘__LZCNT__’ was not declared in this scope; did you mea

Change-Id: Ib42b3adc93bf4d43bd55fffd16c10f8b6a775f3f
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
This commit is contained in:
Thiago Macieira 2021-12-15 19:53:50 -03:00
parent 5f7e02efb8
commit ad65bbe4c0
1 changed files with 17 additions and 8 deletions
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25
src/corelib/global/qsimd_p.h
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@ -55,6 +55,11 @@
#include <QtCore/private/qglobal_p.h>
#include <QtCore/qsimd.h>
QT_WARNING_PUSH
QT_WARNING_DISABLE_CLANG("-Wundef")
QT_WARNING_DISABLE_GCC("-Wundef")
QT_WARNING_DISABLE_INTEL(103)
#define ALIGNMENT_PROLOGUE_16BYTES(ptr, i, length) \
for (; i < static_cast<int>(qMin(static_cast<quintptr>(length), ((4 - ((reinterpret_cast<quintptr>(ptr) >> 2) & 0x3)) & 0x3))); ++i)
@ -233,26 +238,28 @@ asm(
# include <immintrin.h>
# endif
# if defined(Q_CC_GNU) && defined(__AVX2__) && (!defined(__BMI__) || !defined(__FMA__))
# error "Please enable the BMI and FMA extensions; you probably want to use -march=haswell or -march=x86-64-v3 instead of -mavx2"
# endif
# include "qsimd_x86_p.h"
// Haswell sub-architecture
// x86-64 sub-architecture version 3
//
// The Intel Core 4th generation was codenamed "Haswell" and introduced AVX2,
// BMI1, BMI2, FMA, LZCNT, MOVBE, which makes it a good divider for a
// sub-target for us. The first AMD processor with AVX2 support (Zen) has the
// same features.
// same features. This feature set was chosen as the version 3 of the x86-64
// ISA (x86-64-v3) and is supported by GCC and Clang.
//
// macOS's fat binaries support the "x86_64h" sub-architecture and the GNU libc
// ELF loader also supports a "haswell/" subdir (e.g., /usr/lib/haswell).
# define QT_FUNCTION_TARGET_STRING_ARCH_HASWELL "arch=haswell"
# if defined(__AVX2__) && defined(__BMI__) && defined(__BMI2__) && defined(__F16C__) && \
defined(__FMA__) && defined(__LZCNT__) && defined(__RDRND__)
# define ARCH_HASWELL_MACROS (__AVX2__ + __BMI__ + __BMI2__ + __F16C__ + __FMA__ + __LZCNT__)
# if ARCH_HASWELL_MACROS != 0
# if ARCH_HASWELL_MACROS != 6
# error "Please enable all x86-64-v3 extensions; you probably want to use -march=haswell or -march=x86-64-v3 instead of -mavx2"
# endif
static_assert(ARCH_HASWELL_MACROS, "Undeclared identifiers indicate which features are missing.");
# define __haswell__ 1
# endif
# undef ARCH_HASWELL_MACROS
#endif /* Q_PROCESSOR_X86 */
// NEON intrinsics
@ -401,4 +408,6 @@ QT_END_NAMESPACE
#endif // __cplusplus
QT_WARNING_POP
#endif // QSIMD_P_H