Replace the Intel Haswell and Ivy Bridge codenames with actual names
Change-Id: I2a31e96d324dd704e6f96b35ec68c79fd64a090e Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@digia.com> Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
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@ -103,15 +103,15 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
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" avx"
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#endif
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#ifdef __AVX2__
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// AVX 2, Intel codename "Haswell"
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// AVX 2, Intel Core 4th Generation ("Haswell")
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" avx2"
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#endif
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#ifdef __BMI__
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// Bit Manipulation Instructions 1, Intel codename "Haswell", AMD "Bulldozer 2"
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// Bit Manipulation Instructions 1, Intel Core 4th Generation ("Haswell"), AMD "Bulldozer 2"
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" bmi"
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#endif
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#ifdef __BMI2__
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// Bit Manipulation Instructions 2, Intel codename "Haswell"
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// Bit Manipulation Instructions 2, Intel Core 4th Generation ("Haswell")
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" bmi2"
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#endif
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
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@ -120,11 +120,11 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
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" cx16"
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#endif
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#ifdef __F16C__
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// 16-bit floating point conversion, Intel codename "Ivy Bridge"
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// 16-bit floating point conversion, Intel Core 3rd Generation ("Ivy Bridge")
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" f16c"
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#endif
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#ifdef __FMA__
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// Fused Multiply-Add with 3 arguments, Intel codename "Haswell", AMD "Bulldozer 2"
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// Fused Multiply-Add with 3 arguments, Intel Core 4th Generation ("Haswell"), AMD "Bulldozer 2"
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// a.k.a. "FMA3"
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" fma"
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#endif
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@ -133,7 +133,7 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
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" fma4"
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#endif
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#ifdef __FSGSBASE__
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// rdfsgsbase, wrfsgsbase, Intel codename "Ivy Bridge"
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// rdfsgsbase, wrfsgsbase, Intel Core 3rd Generation ("Ivy Bridge")
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" fsgsbase"
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#endif
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#ifdef __LWP__
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@ -141,7 +141,7 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
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" lwp"
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#endif
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#ifdef __LZCNT__
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// Leading-Zero bit count, Intel codename "Haswell"
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// Leading-Zero bit count, Intel Core 4th Generation ("Haswell")
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" lzcnt"
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#endif
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#ifdef __MMX__
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@ -166,7 +166,7 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
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" popcnt"
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#endif
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#ifdef __RDRND__
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// Random number generator, Intel codename "Ivy Bridge"
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// Random number generator, Intel Core 3rd Generation ("Ivy Bridge")
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" rdrnd"
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#endif
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#if defined(__SSE__) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1) || defined(_M_X64)
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