Update the x86 feature-detection code, unifying x86 and x86-64
Most of it is the same for both of them, so let's avoid doing everything twice. Or more, since we may support x32 soon. For Windows, use the intrinsics. For GCC, we'd like to use cpuid.h, but it only exists since GCC 4.3, so we can't. And properly detect AVX support: it's not enough to detect that the processor supports them, we also need to check that the OS enabled support for the 256-bit registers. Change-Id: Ibb4872cdb774de5701b18c40f4e612330a266214 Reviewed-by: Bradley T. Hughes <bradley.hughes@nokia.com> Reviewed-by: Samuel Rødal <samuel.rodal@nokia.com>
This commit is contained in:
Thiago Macieira
Qt by Nokia
parent
01ee098531
commit
dc6d1c6c3f
@ -1,6 +1,7 @@
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/****************************************************************************
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/****************************************************************************
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**
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**
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** Copyright (C) 2012 Nokia Corporation and/or its subsidiary(-ies).
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** Copyright (C) 2012 Nokia Corporation and/or its subsidiary(-ies).
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** Copyright (C) 2012 Intel Corporation.
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** Contact: http://www.qt-project.org/
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** Contact: http://www.qt-project.org/
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**
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**
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** This file is part of the QtCore module of the Qt Toolkit.
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** This file is part of the QtCore module of the Qt Toolkit.
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@ -145,17 +146,27 @@ static inline uint detectProcessorFeatures()
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return features;
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return features;
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}
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}
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#elif defined(Q_PROCESSOR_X86_32)
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#elif defined(Q_PROCESSOR_X86)
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static inline uint detectProcessorFeatures()
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{
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uint features = 0;
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unsigned int extended_result = 0;
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#ifdef Q_PROCESSOR_X86_32
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unsigned int feature_result = 0;
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# define PICreg "%%ebx"
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uint result = 0;
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#else
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/* see p. 118 of amd64 instruction set manual Vol3 */
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# define PICreg "%%rbx"
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#if defined(Q_CC_GNU)
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#endif
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long cpuid_supported, tmp1;
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static int maxBasicCpuidSupported()
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{
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#ifdef Q_OS_WIN
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// Use the __cpuid function; if the CPUID instruction isn't supported, it will return 0
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int info[4];
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__cpuid(info, 0);
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return info[0];
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#elif defined(Q_CC_GNU)
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long tmp1;
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# ifdef Q_PROCESSOR_X86_32
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// check if the CPUID instruction is supported
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long cpuid_supported;
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asm ("pushf\n"
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asm ("pushf\n"
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"pop %0\n"
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"pop %0\n"
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"mov %0, %1\n"
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"mov %0, %1\n"
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@ -167,132 +178,100 @@ static inline uint detectProcessorFeatures()
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"xor %1, %0\n" // %eax is now 0 if CPUID is not supported
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"xor %1, %0\n" // %eax is now 0 if CPUID is not supported
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: "=a" (cpuid_supported), "=r" (tmp1)
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: "=a" (cpuid_supported), "=r" (tmp1)
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);
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);
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if (cpuid_supported) {
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if (!cpuid_supported)
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asm ("xchg %%ebx, %2\n"
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return 0;
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"cpuid\n"
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# endif
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"xchg %%ebx, %2\n"
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: "=&c" (feature_result), "=d" (result), "=&r" (tmp1)
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: "a" (1));
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asm ("xchg %%ebx, %1\n"
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int result;
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"cpuid\n"
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asm ("xchg "PICreg", %1\n"
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"cmp $0x80000000, %%eax\n"
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"cpuid\n"
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"jnbe 1f\n"
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"xchg "PICreg", %1\n"
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"xor %0, %0\n"
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: "=&a" (result), "=&r" (tmp1)
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"jmp 2f\n"
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: "0" (0)
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"1:\n"
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: "ecx", "edx");
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"mov $0x80000001, %%eax\n"
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return result;
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"cpuid\n"
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#else
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"2:\n"
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return 0;
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"xchg %%ebx, %1\n"
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#endif
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: "=&d" (extended_result), "=&r" (tmp1)
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}
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: "a" (0x80000000)
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: "%ecx"
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);
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}
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#elif defined (Q_OS_WIN)
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static void cpuidFeatures01(uint &ecx, uint &edx)
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_asm {
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{
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push eax
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#ifdef Q_OS_WIN
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push ebx
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int info[4];
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push ecx
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__cpuid(info, 1);
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push edx
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ecx = info[2];
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pushfd
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edx = info[3];
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pop eax
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#elif defined(Q_CC_GNU)
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mov ebx, eax
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long tmp1;
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xor eax, 00200000h
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asm ("xchg "PICreg", %2\n"
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push eax
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"cpuid\n"
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popfd
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"xchg "PICreg", %2\n"
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pushfd
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: "=&c" (ecx), "=&d" (edx), "=&r" (tmp1)
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pop eax
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: "a" (1));
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mov edx, 0
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#endif
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xor eax, ebx
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}
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jz skip
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mov eax, 1
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static void cpuidFeatures07_00(uint &ebx)
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cpuid
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{
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mov result, edx
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#ifdef Q_OS_WIN
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mov feature_result, ecx
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int info[4];
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skip:
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__cpuidex(info, 7, 0);
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pop edx
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ebx = info[1];
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pop ecx
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#elif defined(Q_CC_GNU)
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pop ebx
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unsigned long rbx; // in case it's 64-bit
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pop eax
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asm ("xchg "PICreg", %0\n"
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}
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"cpuid\n"
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"xchg "PICreg", %0\n"
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: "=&r" (rbx)
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: "a" (7), "c" (0)
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: "%edx");
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ebx = rbx;
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#endif
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}
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_asm {
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#ifdef Q_OS_WIN
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push eax
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namespace QtXgetbvHack {
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push ebx
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inline quint64 _xgetbv(int) { return 0; }
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push ecx
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}
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push edx
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using namespace QtXgetbvHack;
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pushfd
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pop eax
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mov ebx, eax
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xor eax, 00200000h
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push eax
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popfd
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pushfd
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pop eax
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mov edx, 0
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xor eax, ebx
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jz skip2
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mov eax, 80000000h
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cpuid
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cmp eax, 80000000h
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jbe skip2
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mov eax, 80000001h
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cpuid
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mov extended_result, edx
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skip2:
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pop edx
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pop ecx
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pop ebx
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pop eax
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}
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#endif
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#endif
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static void xgetbv(int in, uint &eax, uint &edx)
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{
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#ifdef Q_OS_WIN
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quint64 result = _xgetbv(in);
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eax = result;
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edx = result >> 32;
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#elif defined(Q_CC_GNU)
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asm ("xgetbv"
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: "=a" (eax), "=d" (edx)
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: "c" (in));
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#endif
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}
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static inline uint detectProcessorFeatures()
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{
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uint features = 0;
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if (maxBasicCpuidSupported() < 1)
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return 0;
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#if defined(Q_PROCESSOR_X86_32)
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unsigned int feature_result = 0;
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uint result = 0;
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cpuidFeatures01(feature_result, result);
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// result now contains the standard feature bits
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// result now contains the standard feature bits
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if (result & (1u << 26))
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if (result & (1u << 26))
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features |= SSE2;
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features |= SSE2;
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if (feature_result & (1u))
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#else
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features |= SSE3;
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// x86-64 or x32
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if (feature_result & (1u << 9))
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features = SSE2;
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features |= SSSE3;
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uint feature_result = 0, tmp;
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if (feature_result & (1u << 19))
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cpuidFeatures01(feature_result, tmp);
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features |= SSE4_1;
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if (feature_result & (1u << 20))
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features |= SSE4_2;
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if (feature_result & (1u << 28))
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features |= AVX;
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return features;
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}
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#elif defined(Q_PROCESSOR_X86_64) || defined(Q_OS_WIN64)
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static inline uint detectProcessorFeatures()
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{
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uint features = SSE2;
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uint feature_result = 0;
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#if defined (Q_OS_WIN64)
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{
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int info[4];
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__cpuid(info, 1);
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feature_result = info[2];
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}
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#elif defined(Q_CC_GNU)
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quint64 tmp;
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asm ("xchg %%rbx, %1\n"
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"cpuid\n"
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"xchg %%rbx, %1\n"
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: "=&c" (feature_result), "=&r" (tmp)
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: "a" (1)
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: "%edx"
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);
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#endif
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#endif
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// common part between 32- and 64-bit
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if (feature_result & (1u))
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if (feature_result & (1u))
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features |= SSE3;
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features |= SSE3;
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if (feature_result & (1u << 9))
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if (feature_result & (1u << 9))
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@ -301,8 +280,17 @@ static inline uint detectProcessorFeatures()
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features |= SSE4_1;
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features |= SSE4_1;
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if (feature_result & (1u << 20))
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if (feature_result & (1u << 20))
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features |= SSE4_2;
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features |= SSE4_2;
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if (feature_result & (1u << 28))
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uint xgetbvA = 0, xgetbvD = 0;
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features |= AVX;
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if (feature_result & (1u << 27)) {
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// XGETBV enabled
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xgetbv(0, xgetbvA, xgetbvD);
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}
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if ((xgetbvA & 6) == 6) {
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// support for YMM and XMM registers is enabled
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if (feature_result & (1u << 28))
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features |= AVX;
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}
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return features;
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return features;
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}
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}
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