1882cf1c9d
Intel CC 12.1 supports AVX2 but only with -march=core-avx2. The -mavx2 option produces a warning. GCC 4.6 does not recognise any option. GCC 4.7 recognises both -mavx2 and -march=core-avx2 so let's use the latter for now. We may need to change to -mavx2 when there's an AMD processor that supports AVX2 too. Change-Id: I529240e6e6c2c0e3942d357e0320212d954fe4de Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@nokia.com>
56 lines
1.9 KiB
C++
56 lines
1.9 KiB
C++
/****************************************************************************
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**
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** Copyright (C) 2012 Intel Corporation.
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** Contact: http://www.qt-project.org/
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**
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** This file is part of the configuration of the Qt Toolkit.
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**
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** $QT_BEGIN_LICENSE:LGPL$
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** GNU Lesser General Public License Usage
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** This file may be used under the terms of the GNU Lesser General Public
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** License version 2.1 as published by the Free Software Foundation and
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** appearing in the file LICENSE.LGPL included in the packaging of this
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** file. Please review the following information to ensure the GNU Lesser
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** http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
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** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
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**
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** GNU General Public License Usage
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** Alternatively, this file may be used under the terms of the GNU General
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** Public License version 3.0 as published by the Free Software Foundation
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** and appearing in the file LICENSE.GPL included in the packaging of this
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** file. Please review the following information to ensure the GNU General
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** Other Usage
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** $QT_END_LICENSE$
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****************************************************************************/
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#include <immintrin.h>
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int main(int, char**)
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{
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/* AVX */
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_mm256_zeroall();
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volatile __m256i a = _mm256_setzero_si256();
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/* AVX2 */
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volatile __m256i b = _mm256_and_si256(a, a);
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volatile __m256i result = _mm256_add_epi8(a, b);
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(void)result;
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return 0;
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}
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