With this implementation, we can have Qt run on any architecture that
GCC supports without having to write specialised code. However, on
some architectures, the code that GCC generates is not optimal: it
uses locking on ARMv5 and it's always fully-ordered. For that reason,
it appears after the Qt native assembly implementations (it's a
fallback, not an override).
Since they all have fully-ordered memory semantics, we define only the
xxxRelaxed functions. The exception is __sync_lock_and_test, which has
acquire semantics, so we need to define the Release and Ordered
versions too.
On some architectures, GCC can support atomics on types different than
32-bit and pointer-sized (like x86, x86-64, ARM and even
MIPS). However, there's no standardised way of telling: GCC seems to
define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8} if those operations
are present, but I couldn't find it on the ARM compiler (it was there
for i386, x86-64, IA-64 and MIPS).
Change-Id: I55ff7a7c0cfc6388b7ad8e2c0dedecffdf2a3e01
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
2bbd2262b3