Thiago Macieira 0f1b6acab7 x86: Add detection of the AES and SHA New Instructions ... The AES instructions were first introduced with the Westmere shrink (22nm) of the Nehalem architecture. The SHA instructions are still pending on Intel architecture, but is available on AMD family 17h (gcc argument -march=znver1). Both features operate on SSE registers, so that's why the MSVC command- line argument is the SSE2 one and the configure-time tests depend on features.sse2. The qmake feature names end in "ni" because "aes" and "sha" are too simple and could clash with other uses. The QT_COMPILER_SUPPORTS_ macro doesn't have the "NI" suffix because it has to match the GCC/Clang predefined macro. Change-Id: I445bb15619f6401494e8fffd149dbd1f862ff51c Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>		2017-02-21 23:48:30 +00:00
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aesni.cpp	x86: Add detection of the AES and SHA New Instructions	2017-02-21 23:48:30 +00:00
aesni.pro	x86: Add detection of the AES and SHA New Instructions	2017-02-21 23:48:30 +00:00