qt5base-lts/config.tests/avx512/avx512.cpp
Thiago Macieira d241616e41 AVX512 test: an intrinsic that GCC forgot to implement prior to GCC8
_mm512_mask_cvtepi32_storeu_epi8 is VPMOVDB (convert from 32-bit to 8-bit
with truncation) where the destination is a memory address, with an
OpMask register used to indicate which of the lanes in the vector to
store. Similarly, _mm512_mask_cvtepi16_storeu_epi8 is VPMOVWB (convert
from 16-bit o 8-bit), which is useful for UTF-16 to Latin1 conversion.

Change-Id: I8f261579aad648fdb4f0fffd15542ea306841ce6
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
2018-09-15 20:55:25 +00:00

112 lines
3.9 KiB
C++

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#include <immintrin.h>
#ifndef __AVX512F__
# error "There doesn't seem to be AVX-512 support in this compiler"
#endif
#ifndef WANT_AVX512
# error ".pro file must define WANT_AVX512 macro to the AVX-512 feature to be tested"
#endif
// The following checks if __AVXx__ is defined, where x is the value in
// WANT_AVX512
#define HAS2(x) __AVX512 ## x ## __
#define HAS(x) HAS2(x)
#if !HAS(WANT_AVX512)
# error "Feature not supported"
#endif
int main(int, char**argv)
{
/* AVX512 Foundation */
__m512i i;
__m512d d;
__m512 f;
__mmask16 m = ~1;
i = _mm512_maskz_loadu_epi32(0, argv);
d = _mm512_loadu_pd((double *)argv + 64);
f = _mm512_loadu_ps((float *)argv + 128);
// some intrinsic that GCC forgot until GCC 8
i = _mm512_maskz_set1_epi32(m, '?');
_mm512_mask_cvtepi32_storeu_epi8(argv, m, i);
#ifdef WANT_AVX512ER
/* AVX512 Exponential and Reciprocal */
f = _mm512_exp2a23_round_ps(f, 8);
#endif
#ifdef WANT_AVX512CD
/* AVX512 Conflict Detection */
i = _mm512_maskz_conflict_epi32(m, i);
#endif
#ifdef WANT_AVX512PF
/* AVX512 Prefetch */
_mm512_mask_prefetch_i64scatter_pd(argv, 0xf, i, 2, 2);
#endif
#ifdef WANT_AVX512DQ
/* AVX512 Doubleword and Quadword support */
m = _mm512_movepi32_mask(i);
#endif
#ifdef WANT_AVX512BW
/* AVX512 Byte and Word support */
i = _mm512_mask_loadu_epi8(i, m, argv - 8);
_mm512_mask_cvtepi16_storeu_epi8(argv + 8, m, i);
#endif
#ifdef WANT_AVX512VL
/* AVX512 Vector Length */
__m256i i2 = _mm256_maskz_loadu_epi32(0, argv);
_mm256_mask_storeu_epi32(argv + 1, m, i2);
#endif
#ifdef WANT_AVX512IFMA
/* AVX512 Integer Fused Multiply-Add */
i = _mm512_madd52lo_epu64(i, i, i);
#endif
#ifdef WANT_AVX512VBMI
/* AVX512 Vector Byte Manipulation Instructions */
i = _mm512_permutexvar_epi8(i, i);
#endif
_mm512_mask_storeu_epi64(argv, m, i);
_mm512_mask_storeu_ps(argv + 64, m, f);
_mm512_mask_storeu_pd(argv + 128, m, d);
return 0;
}