Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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### Compilation failed:
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error: SPIR-V validation error: Uniform OpVariable <id> '10[%colorWhite]' has illegal type.
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From Vulkan spec, section 14.5.2:
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Variables identified with the Uniform storage class are used to access transparent buffer backed resources. Such variables must be typed as OpTypeStruct, or an array of this type
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%colorWhite = OpVariable %_ptr_Uniform_v4float Uniform
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2021-01-26 16:06:42 +00:00
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OpCapability Shader
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%1 = OpExtInstImport "GLSL.std.450"
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OpMemoryModel Logical GLSL450
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2021-01-27 00:58:22 +00:00
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OpEntryPoint Fragment %_entrypoint "_entrypoint" %sk_FragColor %sk_Clockwise
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OpExecutionMode %_entrypoint OriginUpperLeft
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OpName %sk_FragColor "sk_FragColor"
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2021-01-26 16:06:42 +00:00
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OpName %sk_Clockwise "sk_Clockwise"
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Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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OpName %colorWhite "colorWhite"
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2021-01-27 00:58:22 +00:00
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OpName %_entrypoint "_entrypoint"
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2021-01-26 16:06:42 +00:00
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OpName %main "main"
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OpName %x "x"
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OpName %r "r"
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OpName %b "b"
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2021-01-27 00:58:22 +00:00
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OpDecorate %sk_FragColor RelaxedPrecision
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OpDecorate %sk_FragColor Location 0
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OpDecorate %sk_FragColor Index 0
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2021-01-26 16:06:42 +00:00
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OpDecorate %sk_Clockwise RelaxedPrecision
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OpDecorate %sk_Clockwise BuiltIn FrontFacing
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Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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OpDecorate %colorWhite RelaxedPrecision
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OpDecorate %colorWhite DescriptorSet 0
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OpDecorate %21 RelaxedPrecision
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OpDecorate %30 RelaxedPrecision
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OpDecorate %34 RelaxedPrecision
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OpDecorate %40 RelaxedPrecision
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OpDecorate %45 RelaxedPrecision
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OpDecorate %46 RelaxedPrecision
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OpDecorate %53 RelaxedPrecision
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OpDecorate %55 RelaxedPrecision
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2021-01-26 16:06:42 +00:00
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OpDecorate %58 RelaxedPrecision
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Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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OpDecorate %65 RelaxedPrecision
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OpDecorate %66 RelaxedPrecision
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OpDecorate %67 RelaxedPrecision
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2021-01-27 00:58:22 +00:00
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%float = OpTypeFloat 32
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%v4float = OpTypeVector %float 4
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%_ptr_Output_v4float = OpTypePointer Output %v4float
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%sk_FragColor = OpVariable %_ptr_Output_v4float Output
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2021-01-26 16:06:42 +00:00
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%bool = OpTypeBool
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%_ptr_Input_bool = OpTypePointer Input %bool
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%sk_Clockwise = OpVariable %_ptr_Input_bool Input
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Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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%_ptr_Uniform_v4float = OpTypePointer Uniform %v4float
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%colorWhite = OpVariable %_ptr_Uniform_v4float Uniform
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2021-01-27 00:58:22 +00:00
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%void = OpTypeVoid
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Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
|
|
|
%14 = OpTypeFunction %void
|
|
|
|
|
%17 = OpTypeFunction %v4float
|
2021-01-26 16:06:42 +00:00
|
|
|
%_ptr_Function_v4float = OpTypePointer Function %v4float
|
|
|
|
|
%_ptr_Function_float = OpTypePointer Function %float
|
|
|
|
|
%float_n5 = OpConstant %float -5
|
|
|
|
|
%float_5 = OpConstant %float 5
|
|
|
|
|
%float_0 = OpConstant %float 0
|
2021-01-26 21:28:12 +00:00
|
|
|
%float_1 = OpConstant %float 1
|
Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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%int = OpTypeInt 32 1
|
|
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%int_0 = OpConstant %int 0
|
2021-01-26 16:06:42 +00:00
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%int_2 = OpConstant %int 2
|
|
|
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%int_1 = OpConstant %int 1
|
Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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%_entrypoint = OpFunction %void None %14
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%15 = OpLabel
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%16 = OpFunctionCall %v4float %main
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OpStore %sk_FragColor %16
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2021-01-27 00:58:22 +00:00
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OpReturn
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|
|
|
|
OpFunctionEnd
|
Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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%main = OpFunction %v4float None %17
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%18 = OpLabel
|
2021-01-26 16:06:42 +00:00
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%x = OpVariable %_ptr_Function_v4float Function
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%r = OpVariable %_ptr_Function_float Function
|
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%b = OpVariable %_ptr_Function_float Function
|
Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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%21 = OpLoad %v4float %colorWhite
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OpStore %x %21
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2021-01-26 16:06:42 +00:00
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OpStore %r %float_n5
|
Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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OpBranch %25
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%25 = OpLabel
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OpLoopMerge %29 %28 None
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OpBranch %26
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%26 = OpLabel
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%30 = OpLoad %float %r
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%32 = OpFOrdLessThan %bool %30 %float_5
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OpBranchConditional %32 %27 %29
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%27 = OpLabel
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%34 = OpLoad %float %r
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%33 = OpExtInst %float %1 FClamp %34 %float_0 %float_1
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%37 = OpAccessChain %_ptr_Function_float %x %int_0
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OpStore %37 %33
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%40 = OpLoad %v4float %x
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%41 = OpCompositeExtract %float %40 0
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%42 = OpFOrdEqual %bool %41 %float_0
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OpSelectionMerge %44 None
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OpBranchConditional %42 %43 %44
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%43 = OpLabel
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OpBranch %29
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%44 = OpLabel
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OpBranch %28
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%28 = OpLabel
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%45 = OpLoad %float %r
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%46 = OpFAdd %float %45 %float_1
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OpStore %r %46
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OpBranch %25
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%29 = OpLabel
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2021-01-27 00:58:22 +00:00
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OpStore %b %float_5
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Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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OpBranch %48
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%48 = OpLabel
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OpLoopMerge %52 %51 None
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OpBranch %49
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%49 = OpLabel
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%53 = OpLoad %float %b
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%54 = OpFOrdGreaterThanEqual %bool %53 %float_0
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OpBranchConditional %54 %50 %52
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%50 = OpLabel
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%55 = OpLoad %float %b
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%56 = OpAccessChain %_ptr_Function_float %x %int_2
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OpStore %56 %55
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%58 = OpLoad %v4float %x
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%59 = OpCompositeExtract %float %58 3
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%60 = OpFOrdEqual %bool %59 %float_1
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OpSelectionMerge %62 None
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OpBranchConditional %60 %61 %62
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%61 = OpLabel
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OpBranch %51
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%62 = OpLabel
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%63 = OpAccessChain %_ptr_Function_float %x %int_1
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OpStore %63 %float_0
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2021-01-27 00:58:22 +00:00
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OpBranch %51
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%51 = OpLabel
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Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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%65 = OpLoad %float %b
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%66 = OpFSub %float %65 %float_1
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OpStore %b %66
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OpBranch %48
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2021-01-27 00:58:22 +00:00
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%52 = OpLabel
|
Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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%67 = OpLoad %v4float %x
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OpReturnValue %67
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2021-01-26 16:06:42 +00:00
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OpFunctionEnd
|
Revert "Add support for top-level uniforms in SPIR-V."
This reverts commit acba30420ce27b3464fd04fac90e822ffd0245d8.
Reason for revert: ASAN breakage on tree for
Perf-Win2019-Clang-GCE-CPU-AVX2-x86_64-(Debug|Release)-All-ASAN
Address 0x009af69fda78 is located in stack of thread T0 at offset 1272 in frame
#0 0x7ff75c069ddf in _asan_wrap_RtlReAllocateHeap+0x44014f (c:\b\s\w\ir\build\nanobench.exe+0x1413a9ddf)
This frame has 35 object(s):
[32, 104) 'body' (line 3363)
[144, 152) 'main' (line 3365)
[176, 184) 'ref.tmp' (line 3366)
[208, 240) '__begin1' (line 3366)
[272, 304) '__end1' (line 3366)
[336, 344) 'ref.tmp27' (line 3370)
[368, 384) 'ref.tmp31' (line 3371)
[400, 416) 'interfaceVars' (line 3382)
[432, 440) 'ref.tmp48' (line 3383)
[464, 496) '__begin151' (line 3383)
[528, 560) '__end154' (line 3383)
[592, 596) 'id' (line 3386)
[608, 624) 'tmp' (line 3393)
[640, 648) 'ref.tmp114' (line 3398)
[672, 704) '__begin1117' (line 3398)
[736, 768) '__end1120' (line 3398)
[800, 1008) 'uniformBuffer' (line 3405)
[1072, 1280) 'ref.tmp159' (line 3407) <== Memory access at offset 1272 is inside this variable
[1344, 1360) 'agg.tmp'
[1376, 1576) 'adapter' (line 3411)
[1648, 1848) 'ref.tmp179' (line 3413)
[1920, 1928) 'ref.tmp191' (line 3415)
[1952, 1960) 'ref.tmp210' (line 3421)
[1984, 2016) '__begin1213' (line 3421)
[2048, 2080) '__end1216' (line 3421)
[2112, 2120) '__begin1242' (line 3427)
[2144, 2152) '__end1247' (line 3427)
[2176, 2192) 'entry256' (line 3427)
[2208, 2224) 'tmp298' (line 3433)
[2240, 2256) 'agg.tmp307'
[2272, 2280) '__begin1365' (line 3457)
[2304, 2312) 'ref.tmp415' (line 3469)
[2336, 2368) '__begin1418' (line 3469)
[2400, 2432) '__end1421' (line 3469)
[2464, 2480) 'agg.tmp436'
Original change's description:
> Add support for top-level uniforms in SPIR-V.
>
> Previously, a uniform not wrapped in an interface block would report a
> SPIR-V error:
>
> "Variables identified with the Uniform storage class are
> used to access transparent buffer backed resources. Such variables must
> be typed as OpTypeStruct, or an array of this type..."
>
> Now, the SPIR-V code generator automatically detects such global
> variables and synthesizes a struct named _UniformBuffer to hold them.
> When these variables are accessed, an OpAccessChain instruction is added
> to grab the variable out of the struct.
>
> Change-Id: I5e852d4de01b866c291506cc8cf6eb547f097d66
> Bug: skia:11225
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/360776
> Commit-Queue: John Stiles <johnstiles@google.com>
> Reviewed-by: Brian Osman <brianosman@google.com>
> Auto-Submit: John Stiles <johnstiles@google.com>
TBR=brianosman@google.com,ethannicholas@google.com,johnstiles@google.com
Change-Id: Ib72e33dbd662a245c20bc9d45d1397454c9588a3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: skia:11225
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/362057
Reviewed-by: John Stiles <johnstiles@google.com>
Commit-Queue: John Stiles <johnstiles@google.com>
Auto-Submit: John Stiles <johnstiles@google.com>
2021-01-29 14:19:39 +00:00
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1 error
|